NVIDIA Analog Layout design team is looking for a Senior Photonic Layout Design Engineer – someone who is excited to join a growing group for developing new silicon photonic devices in addition to handling challenges in high-speed mixed-signal circuit designs.
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.
What you'll be doing:
Planning and implementation of high-speed electro-optical and mixed-signal analog layout designs in state-of-the-art sub-micron SiPh, CMOS, FinFET technologies using Cadence tools
Perform physical layout for electro-optic and mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs.
Work with electro-optics and mixed-signal engineers to customize designs for integration in photonic and VLSI products.
Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis
What we need to see:
Minimum 7 years of relevant mask analog layout experience
B.Sc. in Electrical Engineering or an Electronics Practical Engineer certificate
Familiar with silicon photonics layout design concepts.
Proven understanding of analog circuit layout concepts in submicron CMOS technologies - such as Operational Amplifiers and ADC/DACs.
Expert with Cadence custom circuit design tools - particularly Virtuoso
Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre
Work effectively in a team, with good interpersonal skills, enthusiasm, and positive energy.
Ways to stand out from the crowd:
Experience with electro-optical ASIC layout.
Previous responsibility for ramping up new process nodes
Proficiency in scripting languages like Python, Skill, and Pcell writing
Knowledge of DRC and LVS checking flows, EM/IR tools, and ability to customize DRC and LVS decks
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the securest silicon possible? If so, we want to hear from you. Come, join our ASIC Security team and help build the real-time, cost-effective computing platform driving our success across several exciting and quickly growing fields.
Last updated: 23 hours ago
© 2021 - 2024