Nvidia Profile
Valuation: Public NVDA Unavailable
Web Address: nvidia.com
Description: NVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.
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Armenia, Yerevan
Canada, Toronto
China, Beijing
- CSP Hardware Application Engineer (China, Beijing)
- Deep Learning Performance Architect (China, Beijing)
- Deep Learning Solution Architect (China, Beijing)
- OEM Account Manager (China, Beijing)
- Payroll Specialist (China, Beijing)
- Senior Networking Architect (China, Beijing)
- Senior Solution Architect - Hardware (China, Beijing)
- Senior Solutions Architect, Ethernet Networking (China, Beijing)
- Senior Solutions Architect, Networking Technology (China, Beijing)
- Senior Solutions Architect, Omniverse Platform (China, Beijing)
- Senior Technical Program Manager, AI Datacenter (China, Beijing)
- Solution Architect - Auto (China, Beijing)
- Solution Architect - CSP Cloud (China, Beijing)
- Solutions Architect, Data Center MEP (China, Beijing)
China, Guangzhou
China, Remote
China, Shanghai
- AI Computing Software Development Engineer, TensorRT (China, Shanghai)
- ASIC Design Engineer - Hardware (China, Shanghai)
- DFX Methodology Engineer (China, Shanghai)
- Deep Learning Intern - Fall 2025 (China, Shanghai)
- Deep Learning Performance Architect (China, Shanghai)
- Deep Learning Performance Architect (China, Shanghai)
- Deep Learning Software Engineering Intern, Test Development - 2025 (China, Shanghai)
- Deep Learning Software Engineering Intern, Test Development - 2025 (China, Shanghai)
- GPU C++ Modeling Engineer (China, Shanghai)
- GPU Kernel Software Engineering Intern - 2025 (China, Shanghai)
- GPU Power Analysis Engineer (China, Shanghai)
- Graphics Tools Software Engineer (China, Shanghai)
- Graphics Tools Software Engineer Intern - 2025 (China, Shanghai)
- HR Business Partner (China, Shanghai)
- Hardware Application Engineer, Ethernet Switch (China, Shanghai)
- IO Design Engineer (China, Shanghai)
- IO Validation Methodology Design Engineer (China, Shanghai)
- LLM Application Intern, AV Infrastructure - 2025 (China, Shanghai)
- Lab Specialist (China, Shanghai)
- Learning and Development Specialist (China, Shanghai)
- Machine Learning Engineer Intern - 2025 (China, Shanghai)
- Machine Learning Software Platform Architect (China, Shanghai)
- Perf Engineering Intern - 2025 (China, Shanghai)
- Performance Engineer Intern, Deep Learning and HPC - 2025 (China, Shanghai)
- Physical Design Engineer (China, Shanghai)
- Product Validation Tools Software Engineer (China, Shanghai)
- Senior AI Training Performance Engineer (China, Shanghai)
- Senior AI Video Architecture Engineer (China, Shanghai)
- Senior ASIC Engineer, Digital Design (China, Shanghai)
- Senior ASIC Verification Engineer (China, Shanghai)
- Senior ASIC Verification Engineer - Networking Chip Design (China, Shanghai)
- Senior Application Software Engineer, Performance (China, Shanghai)
- Senior Autonomous Vehicles Engineer - Mapping and Localization (China, Shanghai)
- Senior C++ Software Engineer - Apache Spark Solution (China, Shanghai)
- Senior CUDA Test Development Software Engineer (China, Shanghai)
- Senior CUDA Test Development Software Engineer (China, Shanghai)
- Senior DFT Methodology - Data Analytics Engineer (China, Shanghai)
- Senior Full-Stack Software Engineer (China, Shanghai)
- Senior Full-Stack Web Applications Software Engineer (China, Shanghai)
- Senior GPU Cluster Software Engineer (China, Shanghai)
- Senior Interconnect Product Engineer (China, Shanghai)
- Senior SRE Software Engineer, Storage and Data (China, Shanghai)
- Senior SWQA Test Development Engineer (China, Shanghai)
- Senior SWQA Test Development Engineer (China, Shanghai)
- Senior SWQA Test Development Engineer, NIM (China, Shanghai)
- Senior SYSASIC Infrastructure and Methodology Design Engineer (China, Shanghai)
- Senior Site Reliability Engineer, Data Science and ML Platforms (China, Shanghai)
- Senior Software and System Architect (China, Shanghai)
- Senior System Software Engineer - Autonomous Driving (China, Shanghai)
- Senior Test Design Methodology Engineer (China, Shanghai)
- Silicon Performance, Power and Binning Tools Engineer (China, Shanghai)
- Software Engineer Intern - Autonomous Vehicles - 2025 (China, Shanghai)
- Software Engineer Intern - Mapping and Generative AI (China, Shanghai)
- Software Engineer Intern, Perception - Autonomous Vehicles - 2025 (China, Shanghai)
- Software Engineering Intern - 2025 (China, Shanghai)
- Software Engineering Intern - CUDA Test Development (China, Shanghai)
- Software Engineering Intern, AI Engineering - 2025 (China, Shanghai)
- Software QA Engineer Intern - 2025 (China, Shanghai)
- Software QA Engineering Intern - 2025 (China, Shanghai)
- Software QA Engineering Intern - 2025 (China, Shanghai)
- Software Test Developer Intern - Spark Rapids, Big Data & Deep Learning - 2025 (China, Shanghai)
- System Performance and Power Engineer (China, Shanghai)
- System Software Engineer Intern - Autonomous Vehicles - 2025 (China, Shanghai)
- System Software Engineer Intern, Apache Spark Solutions - 2025 (China, Shanghai)
- System Software Engineer, Database and API Design (China, Shanghai)
- System Software Engineer, GPU Development Tools (China, Shanghai)
- Web Software Development Intern - 2025 (China, Shanghai)
China, Shenzhen
- Board Design Engineer, LDE (China, Shenzhen)
- Customer Program Manager - Auto (China, Shenzhen)
- Customer Technical Program Manager (China, Shenzhen)
- Manufacturing Engineer (China, Shenzhen)
- Operation Program Manager (China, Shenzhen)
- Software Engineer Intern, Autonomous Vehicle - 2025 (China, Shenzhen)
- Supply Base Engineer (China, Shenzhen)
- System Memory Validation Software Engineer (China, Shenzhen)
- System Software Engineer Intern, Autonomous Vehicles - 2025 (China, Shenzhen)
Denmark, Roskilde
Germany, Munich
Germany, Remote
Germany, Stuttgart
Hong Kong, Remote
Hong Kong, STP
India, Bengaluru
- ASIC Design and STA Engineer (India, Bengaluru)
- ASIC Engineer (India, Bengaluru)
- CAD Engineer (India, Bengaluru)
- Circuit Design Engineer (India, Bengaluru)
- DFT Engineer (India, Bengaluru)
- DFT Engineer - Hardware (India, Bengaluru)
- DFT Engineer - Hardware (India, Bengaluru)
- DFX CAD Tools Development Engineer (India, Bengaluru)
- Deep Learning Engineer, Datacenters (India, Bengaluru)
- Deep Learning Performance Architect (India, Bengaluru)
- EDA System Software Engineer (India, Bengaluru)
- Engineering Farm Engineer (India, Bengaluru)
- High Speed IO Validation Engineer (India, Bengaluru)
- Intellectual Property Security Engineer (India, Bengaluru)
- Layout Design Engineer (India, Bengaluru)
- Senior ASIC Design Engineer - NOC IP (India, Bengaluru)
- Senior ASIC Power and Thermal Engineer (India, Bengaluru)
- Senior CAD Engineer (India, Bengaluru)
- Senior Field Applications Engineer (India, Bengaluru)
- Senior Formal Verification Engineer (India, Bengaluru)
- Senior Mask Designer (India, Bengaluru)
- Senior PD Methodology Engineer (India, Bengaluru)
- Senior Python Software Engineer, Security (India, Bengaluru)
- Senior SRAM Circuit Design Engineer (India, Bengaluru)
- Senior Silicon Solution Engineer - Hardware (India, Bengaluru)
- Senior Site Reliability Engineer - AI Research Clusters (India, Bengaluru)
- Senior Site Reliability Engineer - AI Research Clusters (India, Bengaluru)
- Senior Site Reliability Engineer - GPU Cloud (India, Bengaluru)
- Senior Software Configuration Management Engineer-SCM (India, Bengaluru)
- Senior Software Engineer - Build and Deployment Tools (India, Bengaluru)
- Senior Solutions Architect - Generative AI (India, Bengaluru)
- Senior Solutions Architect - Generative AI (India, Bengaluru)
- Senior Solutions Architect, Generative AI (India, Bengaluru)
- Senior System Software Engineer (India, Bengaluru)
- Senior System Software Engineer - Automotive Platform (India, Bengaluru)
- Senior System Software Engineer, Firmware (India, Bengaluru)
- Senior System Software Engineer, GPU Firmware (India, Bengaluru)
- Silicon Power Engineer (India, Bengaluru)
- Silicon Power Engineer (India, Bengaluru)
- Silicon Power Perf Engineer (India, Bengaluru)
- Software Test Developer and Automation Engineer - Automotive (India, Bengaluru)
- Software Test Developer and Automation Engineer - Automotive (India, Bengaluru)
- System Software Architect, Programmable Vision Accelerator (India, Bengaluru)
- System Software Engineer (India, Bengaluru)
- System Software Engineer - OpenBMC (India, Bengaluru)
- System Software Engineer, GPU Development Tools (India, Bengaluru)
- System Software Engineer, GPU Tools Development (India, Bengaluru)
- System Validation Engineer (India, Bengaluru)
India, Hyderabad
India, Mumbai
India, Pune
Israel, Beer Sheva
Israel, Raanana
- Director, Hardware Engineering (Israel, Raanana)
- SDK Eth Software Team Manager (Israel, Raanana)
- Senior Analog Mixed Signal Design Engineer (Israel, Raanana)
- Senior Board Design Hardware Engineer (Israel, Raanana)
- Senior Board Design Hardware Engineer (Israel, Raanana)
- Senior Firmware Verification Engineer (Israel, Raanana)
- Senior Product Manager - SONiC (Israel, Raanana)
- Senior Product Manager, ASIC Simulation (Israel, Raanana)
- Senior Software Engineer - Backend (Israel, Raanana)
- Senior Software Engineer - Ethernet Switch (Israel, Raanana)
- Senior Software Engineer - Ethernet Switch (Israel, Raanana)
- Senior Software Engineer - SONiC Design Group (Israel, Raanana)
- Senior Software Engineer, Linux Kernel Upstream (Israel, Raanana)
- Senior Software QA Automation Engineer (Israel, Raanana)
- Senior Software Video Engineer (Israel, Raanana)
- Senior Technical Instructor - AI and Data Center Infrastructure (Israel, Raanana)
- Software Manager, DOCA Verification (Israel, Raanana)
Israel, Ramat Gan
Israel, Tel Aviv
- Chip Design Architect (Israel, Tel Aviv)
- Chip Design Manager (Israel, Tel Aviv)
- Chip Design Verification Engineer (Israel, Tel Aviv)
- Clock Design Engineer (Israel, Tel Aviv)
- Director of AI Research (Israel, Tel Aviv)
- Director, Ethernet Solutions Product Management (Israel, Tel Aviv)
- Firmware PHY Verification Engineer (Israel, Tel Aviv)
- Manager, Chip Design Verification (Israel, Tel Aviv)
- Manager, Chip Design Verification (Israel, Tel Aviv)
- Manager, Firmware Verification (Israel, Tel Aviv)
- Manager, Software Engineering (Israel, Tel Aviv)
- Physical Design Backend Engineer (Israel, Tel Aviv)
- Physical Design Backend Engineer (Israel, Tel Aviv)
- Physical Design Engineer (Israel, Tel Aviv)
- Physical Design Engineer (Israel, Tel Aviv)
- Power Integrity Engineer (Israel, Tel Aviv)
- SDK/FW Verification Engineer (Israel, Tel Aviv)
- SOC Clock Distribution Engineer (Israel, Tel Aviv)
- SOC Verification Engineer (Israel, Tel Aviv)
- STA Backend Engineer (Israel, Tel Aviv)
- STA Engineer (Israel, Tel Aviv)
- Senior AI System Security Architect - Networking (Israel, Tel Aviv)
- Senior Chip Architect (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer, Formal Verification (Israel, Tel Aviv)
- Senior Chip Design Verification Engineer (Israel, Tel Aviv)
- Senior Chip Design Verification Engineer (Israel, Tel Aviv)
- Senior Chip Design Verification Engineer (Israel, Tel Aviv)
- Senior Chip Design Verification Engineer (Israel, Tel Aviv)
- Senior Chip Design Verification Engineer (Israel, Tel Aviv)
- Senior DFT Verification Engineer (Israel, Tel Aviv)
- Senior Firmware Design Engineer (Israel, Tel Aviv)
- Senior Firmware Engineer (Israel, Tel Aviv)
- Senior Firmware PHY Verification Engineer (Israel, Tel Aviv)
- Senior High-Performance System Architect (Israel, Tel Aviv)
- Senior Malware Research Architect (Israel, Tel Aviv)
- Senior Networking Security Research Architect (Israel, Tel Aviv)
- Senior Physical Design Backend Engineer (Israel, Tel Aviv)
- Senior Physical Design Backend Engineer (Israel, Tel Aviv)
- Senior Power and Performance Architect (Israel, Tel Aviv)
- Senior Program Manager - Chip Design (Israel, Tel Aviv)
- Senior STA Engineer (Israel, Tel Aviv)
- Senior Software Architect, Accelerated Computing SDN (Israel, Tel Aviv)
- Senior Software Engineer (Israel, Tel Aviv)
- Senior Software Engineer (Israel, Tel Aviv)
- Senior VLSI Integration Engineer (Israel, Tel Aviv)
Israel, Tel Aviv-HaArbaa St
Israel, Yokneam
- AI Network System Architect (Israel, Yokneam)
- Chip Architect (Israel, Yokneam)
- Chip Design Methodologies Engineer (Israel, Yokneam)
- Chip Design Verification Engineer (Israel, Yokneam)
- Firmware Manager (Israel, Yokneam)
- HPC Lab Manager (Israel, Yokneam)
- Hardware Board Design Manager, IC Product (Israel, Yokneam)
- Interconnect Failure Analysis Hardware Engineer (Israel, Yokneam)
- Interconnect Hardware Test Engineer (Israel, Yokneam)
- Manager, Software Verification (Israel, Yokneam)
- Material Engineering Student (Israel, Yokneam)
- Optics Firmware Design Engineer (Israel, Yokneam)
- Optics Firmware Verification Engineer (Israel, Yokneam)
- Optics Firmware Verification Engineer (Israel, Yokneam)
- PCB Layout Design Manager (Israel, Yokneam)
- Physical Design Backend Engineer (Israel, Yokneam)
- Physical Design Backend Engineer (Israel, Yokneam)
- Physical Design CAD Engineer (Israel, Yokneam)
- Physical Design CAD Manager (Israel, Yokneam)
- Physical Design Full Chip STA Engineer (Israel, Yokneam)
- Physical Design Manager (Israel, Yokneam)
- Physical Design Power Optimization Engineer (Israel, Yokneam)
- Physical Design Signoff CAD Engineer (Israel, Yokneam)
- Physical Layer Firmware Architecture Engineer (Israel, Yokneam)
- Principal Software Architect, Advanced Development (Israel, Yokneam)
- Program Manager, Sourcing - Operations (Israel, Yokneam)
- Senior ASIC Design Engineer (Israel, Yokneam)
- Senior ASIC Engineer (Israel, Yokneam)
- Senior Analog Layout Design Engineer (Israel, Yokneam)
- Senior Board Design Engineer (Israel, Yokneam)
- Senior Board Design Hardware Engineer (Israel, Yokneam)
- Senior Chip Architect (Israel, Yokneam)
- Senior Chip-Design Verification Engineer (Israel, Yokneam)
- Senior DFT Engineer (Israel, Yokneam)
- Senior Data Scientist and System Architect (Israel, Yokneam)
- Senior DevOps Engineer (Israel, Yokneam)
- Senior Electrical Validation Team Manager (Israel, Yokneam)
- Senior Electronics Failure Analysis Hardware Engineer (Israel, Yokneam)
- Senior Financial Analyst (Israel, Yokneam)
- Senior Firmware Design Engineer (Israel, Yokneam)
- Senior Firmware PHY Developer (Israel, Yokneam)
- Senior Firmware Verification Engineer, PCIe (Israel, Yokneam)
- Senior Functional Test Engineer (Israel, Yokneam)
- Senior GMP Project Manager (Israel, Yokneam)
- Senior GTM Program Manager (Israel, Yokneam)
- Senior HPC AI Engineer (Israel, Yokneam)
- Senior HPC DevOps Engineer (Israel, Yokneam)
- Senior Hardware Reliability Board Design Engineer (Israel, Yokneam)
- Senior IC Test Engineer (Israel, Yokneam)
- Senior ICT and JTAG Test Engineer (Israel, Yokneam)
- Senior Layout Engineer (Israel, Yokneam)
- Senior Manager, High-Speed Optical Transceiver Design (Israel, Yokneam)
- Senior Manager, Interconnect Product Engineering (Israel, Yokneam)
- Senior Manager, NPI System Product Engineering (Israel, Yokneam)
- Senior Manager, Production Infrastructure Equipment (Israel, Yokneam)
- Senior Mechanical Engineer (Israel, Yokneam)
- Senior Mechanical Manager (Israel, Yokneam)
- Senior NPI Engineer (Israel, Yokneam)
- Senior Network Algorithms Architect (Israel, Yokneam)
- Senior Network Engineer (Israel, Yokneam)
- Senior Network Test Engineer (Israel, Yokneam)
- Senior Networking Electrical Validation Engineer (Israel, Yokneam)
- Senior Networking Engineer, Next Generation InfiniBand (Israel, Yokneam)
- Senior PCB Design Layout Engineer (Israel, Yokneam)
- Senior Package Layout Engineer (Israel, Yokneam)
- Senior Physical Design Backend Engineer (Israel, Yokneam)
- Senior Physical Design Full Chip STA Engineer (Israel, Yokneam)
- Senior Physical Design Verification Layout Engineer (Israel, Yokneam)
- Senior Post-Silicon Characterization Engineer (Israel, Yokneam)
- Senior Post-Silicon PHY System Engineer (Israel, Yokneam)
- Senior Power Modeling and U-arch Engineer (Israel, Yokneam)
- Senior Reliability Engineer (Israel, Yokneam)
- Senior Security Engineer (Israel, Yokneam)
- Senior Software Architect, Advanced Development (Israel, Yokneam)
- Senior Software Engineer (Israel, Yokneam)
- Senior Software Engineer (Israel, Yokneam)
- Senior Software Engineer - Networking, SAI (Israel, Yokneam)
- Senior Software Engineer - System Customization Team (Israel, Yokneam)
- Senior Software Manager (Israel, Yokneam)
- Senior Software Research Architect (Israel, Yokneam)
- Senior Software Test Development Engineer (Israel, Yokneam)
- Senior Software Verification Engineer (Israel, Yokneam)
- Senior Software Verification Engineer (Israel, Yokneam)
- Senior Software Verification Engineer - Switch Simulation (Israel, Yokneam)
- Senior System Product Engineer (Israel, Yokneam)
- Senior System Software Architect, HPC Networking (Israel, Yokneam)
- Senior System Test Design Engineer (Israel, Yokneam)
- Senior System Validation Engineer (Israel, Yokneam)
- Senior System Validation Engineer (Israel, Yokneam)
- Senior Test Product Engineer (Israel, Yokneam)
- Signal Processing Communication Engineer (Israel, Yokneam)
- Software Manager, Golang Kubernetes (Israel, Yokneam)
- Software Test Development Engineer (Israel, Yokneam)
- Software Verification Manager (Israel, Yokneam)
- Stress Simulation Engineer - Test (Israel, Yokneam)
- System Linux Administrator (Israel, Yokneam)
- Technical Project Lead, SPE (Israel, Yokneam)
Japan, Tokyo
- AI Developer Technology Engineer (Japan, Tokyo)
- Deep Learning Engineer, Generative AI and 3D Reconstruction (Japan, Tokyo)
- Deep-Learning Software Engineer, Performance Optimization (Japan, Tokyo)
- HR Manager, Japan (Japan, Tokyo)
- Senior Business Development Manager - Robotics (Japan, Tokyo)
- Senior Developer Relations Manager - Manufacturing (Japan, Tokyo)
- Senior Developer Relations Manager - Robotics (Japan, Tokyo)
Korea, Remote
Korea, Seoul
Poland, Remote
Poland, Warsaw
Romania, Remote
Saudi Arabia, Remote
Singapore, Remote
Singapore, Singapore-Suntec Tower
Switzerland, Zurich
Taiwan, Hsinchu
- AI Algorithms Software Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Chip Factory Planner (Taiwan, Hsinchu)
- Data Center NPI Program Manager (Taiwan, Hsinchu)
- Data Systems Analyst (RDSS Intern) (Taiwan, Hsinchu)
- Design Verification Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Digital Circuit Design Engineer (Taiwan, Hsinchu)
- Mixed Signal Analog Circuit Designer (RDSS Intern) (Taiwan, Hsinchu)
- Mixed Signal Design Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Mixed-Signal Circuit Design Engineer - New College Graduate (Taiwan, Hsinchu)
- Product Development Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Product Test Engineer (Taiwan, Hsinchu)
- Product Test Engineer (Taiwan, Hsinchu)
- Product Test Hardware Engineer (Taiwan, Hsinchu)
- Senior ASIC Verification Engineer, Coherent High Speed Interconnect (Taiwan, Hsinchu)
- Senior Design Engineer, Coherent High Speed Interconnect (Taiwan, Hsinchu)
- Senior Digital Design Verification Engineer - Hardware (Taiwan, Hsinchu)
- Senior Manufacturing Engineer (Taiwan, Hsinchu)
- Senior Mask Layout Design Engineer (Taiwan, Hsinchu)
- Senior Mask Layout Design Engineer (Taiwan, Hsinchu)
- Senior Mask Layout Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Circuit Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Circuit Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Verification Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal and Analog Circuit Designer (Taiwan, Hsinchu)
- Senior Physical Design Engineer (Taiwan, Hsinchu)
- Senior Product Test Engineer (Taiwan, Hsinchu)
- Senior Silicon Photonics Test Engineer (Taiwan, Hsinchu)
- Senior Supplier Quality Engineer - Electronic Components (Taiwan, Hsinchu)
- Senior Verification Engineer (Taiwan, Hsinchu)
- Silicon Photonics Test Engineer (Taiwan, Hsinchu)
- Structural Test Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Test Floor Engineer (Taiwan, Hsinchu)
- Test Floor Product Engineer (Taiwan, Hsinchu)
Taiwan, Taipei
- AI Computing Software Development Engineer, TensorRT (Taiwan, Taipei)
- Circuit Engineer (Taiwan, Taipei)
- Customer Program Manager (Taiwan, Taipei)
- DFX Software Engineer (RDSS Intern) (Taiwan, Taipei)
- Data Engineer (Taiwan, Taipei)
- Data Scientist (Taiwan, Taipei)
- Design Verification Engineer - PCIE (Taiwan, Taipei)
- Developer Technology Engineer - HPC and AI (Taiwan, Taipei)
- Diag Software Manager - Server (Taiwan, Taipei)
- Director, AI Software (Taiwan, Taipei)
- EMC Engineer (Taiwan, Taipei)
- Engineering Build Manager (Taiwan, Taipei)
- Enterprise Software Test Development Engineer (Taiwan, Taipei)
- Enterprise Software Test Development Engineer (Taiwan, Taipei)
- GPU Firmware Engineer (RDSS Intern) (Taiwan, Taipei)
- GPU Firmware Manager (Taiwan, Taipei)
- MCU Firmware Engineer (Taiwan, Taipei)
- Mixed Signal Design Engineer (RDSS Intern) (Taiwan, Taipei)
- Payroll Manager (Taiwan, Taipei)
- Payroll Specialist (Taiwan, Taipei)
- Regional Planner (Taiwan, Taipei)
- Research Scientist - Design Automation (Taiwan, Taipei)
- Research Scientist, Circuits (Taiwan, Taipei)
- Research Scientist, Deep Learning and Computer Vision (Taiwan, Taipei)
- SRE Software Engineer, Storage and Data (Taiwan, Taipei)
- Safety Engineer (Taiwan, Taipei)
- Security System Software Engineer (RDSS Intern) (Taiwan, Taipei)
- Senior BMC Firmware Development Engineer - Platform Lead (Taiwan, Taipei)
- Senior Embedded System Software Engineer (Taiwan, Taipei)
- Senior Generalist Software Engineer -- Omniverse (Taiwan, Taipei)
- Senior Mechanical Engineer (Taiwan, Taipei)
- Senior Memory Engineer (Taiwan, Taipei)
- Senior Memory Engineer (Taiwan, Taipei)
- Senior Mixed Signal Designer Engineer (Taiwan, Taipei)
- Senior Performance Software Engineer (Taiwan, Taipei)
- Senior Signal and Power Integrity Engineer (Taiwan, Taipei)
- Senior Software Engineer (Taiwan, Taipei)
- Senior Software Engineer – Simulation and Virtualization (Taiwan, Taipei)
- Senior Software Program Manager (Taiwan, Taipei)
- Senior System BIOS Firmware Developer, Client Product (Taiwan, Taipei)
- Senior Technical Program Manager - Deep Learning Enterprise Server Software (Taiwan, Taipei)
- Senior Tool and Methodology Development Software Engineer (Taiwan, Taipei)
- Senior Tool and Methodology Development Software Engineer (Taiwan, Taipei)
- Signal and Power Integrity Engineer (Taiwan, Taipei)
- Signal and Power Integrity Engineer (RDSS Intern) (Taiwan, Taipei)
- Silicon Validation Engineer (RDSS Intern) (Taiwan, Taipei)
- Software Engineering Intern - OpenBMC (Taiwan, Taipei)
- Software Engineering, Autonomous Vehicles (RDSS Intern) (Taiwan, Taipei)
- Software Program Manager (Taiwan, Taipei)
- Solutions Architect (Taiwan, Taipei)
- Solutions Architect, Data Science (Taiwan, Taipei)
- Staff Systems Software Engineer- Server (Taiwan, Taipei)
- System Design Power Validation Engineer (Taiwan, Taipei)
- System Design Power Validation Engineer - New College Grad (Taiwan, Taipei)
- System Software Application Engineer (Taiwan, Taipei)
- System Software Engineer (Taiwan, Taipei)
- System Software Engineer (RDSS Intern) – Embedded and Automotive Power Management (Taiwan, Taipei)
- System Software Engineer - Base OS (RDSS Intern) (Taiwan, Taipei)
- System Software Engineer - Embedded and Automotive (RDSS Intern) (Taiwan, Taipei)
- System Software Engineer, GPU - New College Graduate (Taiwan, Taipei)
- Technical Marketing Manager (Taiwan, Taipei)
- Tegra Software Engineer (RDSS Intern) (Taiwan, Taipei)
- Vice President, Sales - Taiwan (Taiwan, Taipei)
Thailand, Remote
UAE, Dubai
UK, Cambridge
UK, Remote
US, AR, Remote
US, CA, Remote
- Full Stack Developer, AI and LLM (US, CA, Remote)
- Global Business Development Lead, Healthcare and Life Sciences Ecosystem (US, CA, Remote)
- Senior Packaging Technical Engineer - Hardware (US, CA, Remote)
- Senior Software Engineer (US, CA, Remote)
- Senior System Software Engineer - Triton Inference Server (US, CA, Remote)
- Senior System Software Engineer, Signing Services (US, CA, Remote)
- Senior Technical Instructor - Data Center Networking (US, CA, Remote)
- Software Engineering Manager - Image and Data Compression Libraries (US, CA, Remote)
- Solutions Architect, Financial Services (US, CA, Remote)
- Staff Client Engineer - Windows (US, CA, Remote)
US, CA, Santa Clara
- AI and ML Infra Engineer, Research Clusters (US, CA, Santa Clara)
- ASIC Design Engineer (US, CA, Santa Clara)
- ASIC Design Engineer - New College Grad 2025 (US, CA, Santa Clara)
- ASIC Design Engineer - New College Grad 2025 (US, CA, Santa Clara)
- ASIC Verification Engineer - GPU (US, CA, Santa Clara)
- Accelerated Computing GPU Product Manager (US, CA, Santa Clara)
- Accounts Payable Specialist (US, CA, Santa Clara)
- Applied Physics ML Research Intern - Fall 2025 (US, CA, Santa Clara)
- CAD Engineer (US, CA, Santa Clara)
- Cable and Connector Architect (US, CA, Santa Clara)
- Campus Development Director (US, CA, Santa Clara)
- DFX Methodology Engineer (US, CA, Santa Clara)
- Data Engineering Specialist (US, CA, Santa Clara)
- Datacenter GPU Power Architect - New College Grad 2025 (US, CA, Santa Clara)
- Datacenter Hardware Applications Engineer (US, CA, Santa Clara)
- Deep Learning Algorithm Engineer - New College Grad 2025 (US, CA, Santa Clara)
- Deep Learning Engineer - Distributed Task-Based Backends (US, CA, Santa Clara)
- Developer Technology Engineer, Public Sector - New College Grad 2025 (US, CA, Santa Clara)
- Digital Design Engineer (US, CA, Santa Clara)
- Director of Business Continuity (US, CA, Santa Clara)
- Director of Mechanical Engineering (US, CA, Santa Clara)
- Director of Product - AI Training Platform Software (US, CA, Santa Clara)
- Director of Reliability (US, CA, Santa Clara)
- Director of Technical Accounting (US, CA, Santa Clara)
- Director, DGX NPI Operations - Datacenter Products (US, CA, Santa Clara)
- Director, Interconnect System Sourcing (US, CA, Santa Clara)
- Director, Lease Accounting (US, CA, Santa Clara)
- Director, Lease Accounting and Portfolio Management (US, CA, Santa Clara)
- Director, Security Systems and Technology (US, CA, Santa Clara)
- Director, Treasury Accounting (US, CA, Santa Clara)
- Distinguished Engineer – Data Center System Software Architect (US, CA, Santa Clara)
- Distinguished Engineer – Data Center System Software Architect (US, CA, Santa Clara)
- Distinguished Software Architect - Deep Learning and HPC Communications (US, CA, Santa Clara)
- Engineering Build Manager (US, CA, Santa Clara)
- Engineering Manager, AI Developer Technology (US, CA, Santa Clara)
- GPU Verification Architect (US, CA, Santa Clara)
- Global Alliance Manager, Developer Relations - Cadence (US, CA, Santa Clara)
- Global Developer Relations Account Manager – Ansys (US, CA, Santa Clara)
- Global Head of Business Development, Financial Services (US, CA, Santa Clara)
- HPC Operations Manager – Hardware Engineering (US, CA, Santa Clara)
- HSIO Functional and Power Management Engineer (US, CA, Santa Clara)
- Hardware Product Quality Manager, PQM (US, CA, Santa Clara)
- Hardware Validation Engineer (US, CA, Santa Clara)
- High-Speed IO Engineer (US, CA, Santa Clara)
- Jira and Confluence Administrator (US, CA, Santa Clara)
- Lab Manager - System Level Test Team (US, CA, Santa Clara)
- Lead Datacenter and Auto PE Technician (US, CA, Santa Clara)
- Linear Algebra Primitives, Product Manager (US, CA, Santa Clara)
- M&A and Integration Lead (US, CA, Santa Clara)
- Machine Learning Software Platform Architect (US, CA, Santa Clara)
- Manager, Cyber Security (US, CA, Santa Clara)
- Manager, Developer Technology (US, CA, Santa Clara)
- Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes (US, CA, Santa Clara)
- Manager, Engineering Product (US, CA, Santa Clara)
- Manager, Materials Planning Management (US, CA, Santa Clara)
- Manager, Prepaid Asset Accounting (US, CA, Santa Clara)
- Manager, Product Quality Engineering (US, CA, Santa Clara)
- Manager, Software Technical Program Management - Datacenter Systems (US, CA, Santa Clara)
- Manager, Substrate Planning - Chips Supply Planning (US, CA, Santa Clara)
- Manager, Systems Software (US, CA, Santa Clara)
- Manager, Systems Software (US, CA, Santa Clara)
- Manager, Technical Marketing Engineering - AI Platform Software (US, CA, Santa Clara)
- Memory Product Manager, GPU Memory (US, CA, Santa Clara)
- Mixed Signal Design Engineer - New College Grad 2025 (US, CA, Santa Clara)
- Network Products Customer Quality Engineer (US, CA, Santa Clara)
- Network Site Reliability Engineer (US, CA, Santa Clara)
- Networking Architect (US, CA, Santa Clara)
- Networking Software Engineer (US, CA, Santa Clara)
- PCB Design Layout Engineer (US, CA, Santa Clara)
- PhD Research Intern, Generalist Embodied Agents Research - Fall 2025 (US, CA, Santa Clara)
- PhD Research Intern, Generalist Embodied Agents Research - Summer 2025 (US, CA, Santa Clara)
- Power Architecture and Optimization Engineer – New College Grad 2025 (US, CA, Santa Clara)
- Power Methodology and Modeling Engineer - New College Grad 2025 (US, CA, Santa Clara)
- Principal DGX Cloud Machine Learning Architect (US, CA, Santa Clara)
- Principal Engineer - DL and AI Software (US, CA, Santa Clara)
- Principal Firmware Engineer - Data Center Server Management (US, CA, Santa Clara)
- Principal Graphics Hardware Architect (US, CA, Santa Clara)
- Principal Platform Software Engineer - Platform Architect (US, CA, Santa Clara)
- Principal Silicon Circuits System Design Engineer (US, CA, Santa Clara)
- Principal Software Engineer (US, CA, Santa Clara)
- Principal Software Engineer - Enterprise AI Platform (US, CA, Santa Clara)
- Principal Software Program Manager (US, CA, Santa Clara)
- Principal Technical Program Manager, AI and Enterprise Apps (US, CA, Santa Clara)
- Principal Thermal Mechanical Photonic Designer (US, CA, Santa Clara)
- Product Manager, Aerial (US, CA, Santa Clara)
- Product Manager- Data Center Ecosystem (US, CA, Santa Clara)
- Product Marketing Manager - TensorRT-LLM (US, CA, Santa Clara)
- Research Scientist, Generalist Embodied Agent Research - New College Grad 2025 (US, CA, Santa Clara)
- Robotics Software Intern, Robotics Platform - Fall 2025 (US, CA, Santa Clara)
- SRAM CAD Engineer - New College Grad 2025 (US, CA, Santa Clara)
- SRAM Circuit Design Engineer - New College Grad 2025 (US, CA, Santa Clara)
- Senior AI Infrastructure Engineer - DGX Cloud (US, CA, Santa Clara)
- Senior AI-HPC Cluster Engineer (US, CA, Santa Clara)
- Senior AI-HPC Storage Engineer (US, CA, Santa Clara)
- Senior ASIC Design Engineer (US, CA, Santa Clara)
- Senior ASIC Design Engineer (US, CA, Santa Clara)
- Senior ASIC Design Engineer - Memory Controller (US, CA, Santa Clara)
- Senior ASIC Design Verification Engineer (US, CA, Santa Clara)
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- Senior ASIC Power Engineer (US, CA, Santa Clara)
- Senior ASIC Timing Engineer (US, CA, Santa Clara)
- Senior ASIC Verification Engineer (US, CA, Santa Clara)
- Senior ASIC Verification Engineer (US, CA, Santa Clara)
- Senior ASIC Verification Engineer - GPU (US, CA, Santa Clara)
- Senior ASIC Verification Engineer - GPU (US, CA, Santa Clara)
- Senior ASIC Verification Engineer, Coherent High Speed Interconnect (US, CA, Santa Clara)
- Senior ASIC Verification and Infrastructure Engineer – GPU (US, CA, Santa Clara)
- Senior ATE Hardware Engineer (US, CA, Santa Clara)
- Senior Accelerated Computing GPU Product Manager (US, CA, Santa Clara)
- Senior Applied LLM Engineer, AI – Chip Design (US, CA, Santa Clara)
- Senior Applied Power Architect - GPU (US, CA, Santa Clara)
- Senior Backend Software Engineer – GeForce NOW Cloud (US, CA, Santa Clara)
- Senior Ballout Designer (US, CA, Santa Clara)
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- Senior Build and Release Engineer (US, CA, Santa Clara)
- Senior CPU Implementation Methodology Engineer (US, CA, Santa Clara)
- Senior CUDA Compute Systems Software Engineer (US, CA, Santa Clara)
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- Senior Circuit Design Engineer (US, CA, Santa Clara)
- Senior Circuit Design Engineer, Power Delivery (US, CA, Santa Clara)
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- Senior Cloud Service Provider Application Engineer (US, CA, Santa Clara)
- Senior Cloud Test Developer Architect (US, CA, Santa Clara)
- Senior Compiler Engineer – Networking Compiler Technology (US, CA, Santa Clara)
- Senior Compiler Engineer, Software - Deep Learning Accelerator (US, CA, Santa Clara)
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- Senior Cost Accountant (US, CA, Santa Clara)
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- Senior Cost Analyst (US, CA, Santa Clara)
- Senior Costing Analyst (US, CA, Santa Clara)
- Senior DFT Engineer (US, CA, Santa Clara)
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- Senior Data Engineer, Cloud Operations Engineering (US, CA, Santa Clara)
- Senior Datacenter GPU Power Architect (US, CA, Santa Clara)
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- Senior Deep Learning Algorithm Engineer (US, CA, Santa Clara)
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- Senior Design for Debug Architect and Methodology Engineer (US, CA, Santa Clara)
- Senior Developer Technology Engineer - AI (US, CA, Santa Clara)
- Senior Developer Technology Engineer, High-Performance Databases (US, CA, Santa Clara)
- Senior Developer Technology Engineer, Public Sector (US, CA, Santa Clara)
- Senior Digital Circuit Design Engineer (US, CA, Santa Clara)
- Senior Digital Design Verification Engineer - Hardware (US, CA, Santa Clara)
- Senior Director, Revenue Accounting (US, CA, Santa Clara)
- Senior Emulation Power Engineer (US, CA, Santa Clara)
- Senior Engineering Manager, Cloud Service Provider Application (US, CA, Santa Clara)
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- Senior Financial Analyst - Forward Cost Model (US, CA, Santa Clara)
- Senior Financial Reporting Analyst (US, CA, Santa Clara)
- Senior Firmware Architect - Server Manageability (US, CA, Santa Clara)
- Senior Firmware Engineer - Embedded Controller (US, CA, Santa Clara)
- Senior Firmware Engineer - Memory Subsystem (US, CA, Santa Clara)
- Senior Firmware Engineer - Memory Subsystem (US, CA, Santa Clara)
- Senior GPU Architect (US, CA, Santa Clara)
- Senior GPU Architect, Profiling System (US, CA, Santa Clara)
- Senior GPU Kernel Performance Lead (US, CA, Santa Clara)
- Senior GPU Low Power Architect (US, CA, Santa Clara)
- Senior GPU Memory Architect (US, CA, Santa Clara)
- Senior Graphics System Software Engineer - Tegra (US, CA, Santa Clara)
- Senior HPC Performance Engineer (US, CA, Santa Clara)
- Senior Hardware Customer Quality Engineer (US, CA, Santa Clara)
- Senior Hardware Product Quality Manager, PQM (US, CA, Santa Clara)
- Senior Hardware Validation Engineer (US, CA, Santa Clara)
- Senior Hardware Validation Engineer (US, CA, Santa Clara)
- Senior High-Performance ASIC Timing Engineer (US, CA, Santa Clara)
- Senior High-Performance LLM Training Engineer (US, CA, Santa Clara)
- Senior Hypervisor and RTOS Engineer (US, CA, Santa Clara)
- Senior Industrial Designer (US, CA, Santa Clara)
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- Senior Manager, GPU and AI Architecture (US, CA, Santa Clara)
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- Senior Manager, Internal Audit - Cybersecurity and Engineering (US, CA, Santa Clara)
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- Senior Mask Design Engineer - Hardware (US, CA, Santa Clara)
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- Senior Mask Design Engineer - Hardware (US, CA, Santa Clara)
- Senior Mask Design Engineer - Hardware (US, CA, Santa Clara)
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- Senior Mask Layout Design Engineer (US, CA, Santa Clara)
- Senior Mask Layout Design Engineer (US, CA, Santa Clara)
- Senior Math Libraries Engineer - Dense Linear Algebra (US, CA, Santa Clara)
- Senior Math Libraries Engineer - Sparse Linear Algebra (US, CA, Santa Clara)
- Senior Math Libraries Engineer – AI and HPC (US, CA, Santa Clara)
- Senior Math Libraries Engineer – Quantum Computing (US, CA, Santa Clara)
- Senior Math Libraries Engineers - Python APIs (US, CA, Santa Clara)
- Senior Mechanical Product Design Engineer (US, CA, Santa Clara)
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- Senior Mixed Design Validation Systems - Electrical/Optical Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Validation Engineer (US, CA, Santa Clara)
- Senior Mixed-Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed-Signal Design Verification Engineer (US, CA, Santa Clara)
- Senior Networking Architect (US, CA, Santa Clara)
- Senior Networking Architect (US, CA, Santa Clara)
- Senior Observability Architect, AI and HPC (US, CA, Santa Clara)
- Senior Optical MSDV Hardware Engineer (US, CA, Santa Clara)
- Senior Optical Mixed Signal Design Validation Engineer (US, CA, Santa Clara)
- Senior PCB Engineer (US, CA, Santa Clara)
- Senior Package Layout Engineer - Hardware (US, CA, Santa Clara)
- Senior Performance Engineer - Deep Learning (US, CA, Santa Clara)
- Senior Photonic Layout Design Engineer (US, CA, Santa Clara)
- Senior Physical Design Engineer (US, CA, Santa Clara)
- Senior Physical Design Methodology Engineer (US, CA, Santa Clara)
- Senior Physical Design Methodology Engineer (US, CA, Santa Clara)
- Senior Physical Design Methodology Engineer, Innovus Flows (US, CA, Santa Clara)
- Senior Physical Design Methodology Engineer, PPA Fusion Compiler (US, CA, Santa Clara)
- Senior Platform Software Engineer, AI Server - GPU (US, CA, Santa Clara)
- Senior Post Silicon Hardware Engineer (US, CA, Santa Clara)
- Senior Power Architecture and Optimization Engineer (US, CA, Santa Clara)
- Senior Power Integrity Engineer (US, CA, Santa Clara)
- Senior Power and Thermal Engineer (US, CA, Santa Clara)
- Senior Product Architect (US, CA, Santa Clara)
- Senior Product Development Engineer (US, CA, Santa Clara)
- Senior Product Development Engineer (US, CA, Santa Clara)
- Senior Product Manager - Unified Commerce Platform (US, CA, Santa Clara)
- Senior Product Manager – AI Networking Orchestration (US, CA, Santa Clara)
- Senior Product Manager, AI for Chip Design (US, CA, Santa Clara)
- Senior Product Marketing Manager (US, CA, Santa Clara)
- Senior Product Marketing Manager, GPUs (US, CA, Santa Clara)
- Senior Program Manager, Chip Assembly Manufacturing Operations (US, CA, Santa Clara)
- Senior RTL Analysis Methodology Engineer (US, CA, Santa Clara)
- Senior Research Engineer for Reinforcement Learning (US, CA, Santa Clara)
- Senior Research Engineer, Foundation Model Training Infrastructure (US, CA, Santa Clara)
- Senior Research Scientist, Multimodal Foundation Models and Robotics (US, CA, Santa Clara)
- Senior Resiliency and Safety Architect (US, CA, Santa Clara)
- Senior SAP SD Business Analyst (US, CA, Santa Clara)
- Senior SRAM Circuit Design Engineer (US, CA, Santa Clara)
- Senior SRAM Engineer, Circuit Design (US, CA, Santa Clara)
- Senior SRAM Engineer, Circuit Design (US, CA, Santa Clara)
- Senior Server Firmware Engineer - SBIOS (US, CA, Santa Clara)
- Senior Signal Integrity Design Engineer (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer - Hardware (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer - Hardware (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer - Hardware (US, CA, Santa Clara)
- Senior Silicon Circuits System Design Engineer (US, CA, Santa Clara)
- Senior Silicon Product Definition Engineer (US, CA, Santa Clara)
- Senior Silicon Product Definition Engineer (US, CA, Santa Clara)
- Senior Silicon Validation and Productization Engineer (US, CA, Santa Clara)
- Senior Site Reliability Engineer (US, CA, Santa Clara)
- Senior Site Reliability Engineer - GPU Clusters (US, CA, Santa Clara)
- Senior Site Reliability Engineer - Internal AI Research Clusters (US, CA, Santa Clara)
- Senior SoC Power Architect (US, CA, Santa Clara)
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- Senior Software Architect - Deep Learning and HPC Communications (US, CA, Santa Clara)
- Senior Software Architect - GPU Fabric Networking (US, CA, Santa Clara)
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- Senior Software Engineer - Python Numerical Computing Libraries (US, CA, Santa Clara)
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- Senior Software Engineer, Code Coverage Tools (US, CA, Santa Clara)
- Senior Software Engineer, Deep Learning Inference, TensorRT (US, CA, Santa Clara)
- Senior Software Engineer, Fabric Networking - GPU (US, CA, Santa Clara)
- Senior Software Engineer, GPU Communications and Networking (US, CA, Santa Clara)
- Senior Software Engineer, Graphics and Gaming (US, CA, Santa Clara)
- Senior Software Engineer, Hardware Tools and Methodology Development (US, CA, Santa Clara)
- Senior Software Engineer, PyTorch - Deep Learning (US, CA, Santa Clara)
- Senior Software Engineer, RTL Optimization Tools (US, CA, Santa Clara)
- Senior Software Engineer, TensorRT-LLM (US, CA, Santa Clara)
- Senior Software Engineer, VLSI Design Tools (US, CA, Santa Clara)
- Senior Software Engineer- Windows for ARM and TEGRA (US, CA, Santa Clara)
- Senior Software Program Manager (US, CA, Santa Clara)
- Senior Software QA Test Development Engineer (US, CA, Santa Clara)
- Senior Software and System Architect (US, CA, Santa Clara)
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- Senior Solutions Architect, Autonomous Vehicles and Robotics (US, CA, Santa Clara)
- Senior Solutions Architect, Global Partner Team (US, CA, Santa Clara)
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- Senior Solutions Architect, Networking - Cloud Service Providers (US, CA, Santa Clara)
- Senior Staff Site Reliability Engineer - CDN (US, CA, Santa Clara)
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- Senior Storage and Data Production Engineer (US, CA, Santa Clara)
- Senior Synthesis Flow CAD Engineer (US, CA, Santa Clara)
- Senior Synthesis Flow Development Engineer (US, CA, Santa Clara)
- Senior System Architect, GPU (US, CA, Santa Clara)
- Senior System Architect, GPU (US, CA, Santa Clara)
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- Senior System Quality Architect - Power, Thermal and Packaging (US, CA, Santa Clara)
- Senior System Reliability Engineer (US, CA, Santa Clara)
- Senior System Software Engineer (US, CA, Santa Clara)
- Senior System Software Engineer (US, CA, Santa Clara)
- Senior System Software Engineer (US, CA, Santa Clara)
- Senior System Software Engineer - AI Performance and Efficiency Tools (US, CA, Santa Clara)
- Senior System Software Engineer - QNX BSP and IO Virtualization (US, CA, Santa Clara)
- Senior System Software Engineer - Tegra (US, CA, Santa Clara)
- Senior System Software Engineer - Tegra (US, CA, Santa Clara)
- Senior System Software Engineer Platform - Microcontroller Development (US, CA, Santa Clara)
- Senior System Software Engineer – DC Platform Software Tools (US, CA, Santa Clara)
- Senior System Software Engineer, CUDA Driver for Windows (US, CA, Santa Clara)
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- Senior System Software Engineer, NCCL - Partner Enablement (US, CA, Santa Clara)
- Senior System Software Engineer, Robotics Simulation (US, CA, Santa Clara)
- Senior System Verification Engineer (US, CA, Santa Clara)
- Senior Systems Software Engineer, Containers and Kubernetes (US, CA, Santa Clara)
- Senior Systems Software Engineer, Data Center - CUDA (US, CA, Santa Clara)
- Senior Systems Software Security Engineer – Factory and Security Provisioning (US, CA, Santa Clara)
- Senior Technical Marketing Engineer - AI Inference at Scale (US, CA, Santa Clara)
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- Senior Technical Marketing Engineer - Distributed AI Model Training (US, CA, Santa Clara)
- Senior Technical Program Manager - GPU Clusters (US, CA, Santa Clara)
- Senior Technical Program Manager - Supply Chain Planning (US, CA, Santa Clara)
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- Senior Technical Program Manager, Compute Software Platform (US, CA, Santa Clara)
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- Senior Timing Methodology Engineer (US, CA, Santa Clara)
- Senior Treasury Operations Manager (US, CA, Santa Clara)
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- Shoreline Backend Engineering Intern - Fall 2025 (US, CA, Santa Clara)
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- Software Configuration Management Engineer – Hardware (US, CA, Santa Clara)
- Software Engineering Intern, AI Storage Infrastructure - Fall 2025 (US, CA, Santa Clara)
- Software Engineering Intern, Deep Learning Accelerator - Fall 2025 (US, CA, Santa Clara)
- Software Engineering Intern, GPU Communications and Networking – Fall 2025 (US, CA, Santa Clara)
- Software Engineering Manager - CUDA Python (US, CA, Santa Clara)
- Software Engineering Manager, Distributed Task-based Runtimes (US, CA, Santa Clara)
- Software Engineering Manager, Sparse Linear Algebra Libraries (US, CA, Santa Clara)
- Software Partner Marketing Manager (US, CA, Santa Clara)
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- System Software Engineer, Performance - CUDA Driver (US, CA, Santa Clara)
- Systems Software Engineer - GeForce NOW Low Latency Streaming Technology (US, CA, Santa Clara)
- Technical Marketing Engineer - AI Platform Software (US, CA, Santa Clara)
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US, MA, Remote
US, MA, Westford
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US, OR, Hillsboro
US, TX, Austin
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