Nvidia Profile
Valuation: Public NVDA Unavailable
Web Address: nvidia.com
Description: NVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.
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Armenia, Yerevan
Australia, Remote
Canada, Remote
Canada, Toronto
China, Beijing
- AI Developer Technology Engineer Intern - 2025 (China, Beijing)
- CSP Hardware Application Engineer (China, Beijing)
- Deep Learning Performance Architect (China, Beijing)
- Deep Learning Solution Architect (China, Beijing)
- Firmware PHY Design Engineer (China, Beijing)
- Firmware PHY Verification Engineer (China, Beijing)
- OEM Account Manager (China, Beijing)
- Payroll Specialist (China, Beijing)
- Senior C/C++ Software Engineer (China, Beijing)
- Senior Solution Architect - Hardware (China, Beijing)
- Senior Solutions Architect, CSP System (China, Beijing)
- Senior Solutions Architect, Ethernet Networking (China, Beijing)
- Senior Solutions Architect, Networking Technology (China, Beijing)
- Senior Solutions Architect, Omniverse Platform (China, Beijing)
- Senior Solutions Architect, Omniverse Platform (China, Beijing)
- Senior Technical Program Manager, AI Datacenter (China, Beijing)
- Solution Architect - Auto (China, Beijing)
- Solution Architect - CSP Cloud (China, Beijing)
- Solutions Architect, Data Center MEP (China, Beijing)
China, Guangzhou
China, Remote
China, Shanghai
- AI Computing Architect Intern - 2025 (China, Shanghai)
- AI Computing Software Development Engineer, TensorRT (China, Shanghai)
- ASIC Physical Design Engineer (China, Shanghai)
- Arch Intern, CPU - 2025 (China, Shanghai)
- Arch Intern, Security - 2025 (China, Shanghai)
- Compute Architect Intern - 2025 (China, Shanghai)
- DL Computing Performance Architect (China, Shanghai)
- Deep Learning Performance Architect (China, Shanghai)
- GPU Kernel Software Engineering Intern - 2025 (China, Shanghai)
- Graphics Tools Software Engineer (China, Shanghai)
- HR Business Partner (China, Shanghai)
- Hardware Application Engineer, Ethernet Switch (China, Shanghai)
- LLM Application Intern, AV Infrastructure - 2025 (China, Shanghai)
- Learning and Development Specialist (China, Shanghai)
- Machine Learning Engineer Intern - 2025 (China, Shanghai)
- Machine Learning Software Platform Architect (China, Shanghai)
- Payroll Specialist (China, Shanghai)
- Perf Engineering Intern - 2025 (China, Shanghai)
- Perf Engineering Intern - 2025 (China, Shanghai)
- Performance Engineer Intern, Deep Learning and HPC - 2025 (China, Shanghai)
- PhD Research Intern, Digital Human AI Research (China, Shanghai)
- Physical Design Engineer (China, Shanghai)
- SWQA Test Development Engineer, DGX Cloud (China, Shanghai)
- SWQA Test Development Engineer, NIM (China, Shanghai)
- Senior AI Training Performance Engineer (China, Shanghai)
- Senior Autonomous Vehicles Engineer - Mapping and Localization (China, Shanghai)
- Senior C++ Software Engineer - Apache Spark Solution (China, Shanghai)
- Senior Custom SOC IP Verification Engineer (China, Shanghai)
- Senior Full-Stack Software Engineer (China, Shanghai)
- Senior GPU Cluster Software Engineer (China, Shanghai)
- Senior SRE Software Engineer, Storage and Data (China, Shanghai)
- Senior SWQA Test Development Engineer, DGX Cloud (China, Shanghai)
- Senior SWQA Test Development Engineer, LLM Benchmarking (China, Shanghai)
- Senior SWQA Test Development Engineer, NIM (China, Shanghai)
- Senior Site Reliability Engineer, Data Science and ML Platforms (China, Shanghai)
- Senior Software Test Development Engineer – Spark Rapids (China, Shanghai)
- Senior Software and System Architect (China, Shanghai)
- Senior Supplier Quality Engineer (China, Shanghai)
- Senior System Low Power Development Engineer (China, Shanghai)
- Senior System Software Engineer - Autonomous Driving (China, Shanghai)
- Silicon Circuit Characterization Engineer (China, Shanghai)
- Software Engineer Intern - Autonomous Vehicles - 2025 (China, Shanghai)
- Software Engineer Intern - Mapping and Generative AI (China, Shanghai)
- Software Engineer Intern, Perception - Autonomous Vehicles - 2025 (China, Shanghai)
- Software Engineering Intern - 2025 (China, Shanghai)
- Software Engineering Intern - Autonomous Vehicles (China, Shanghai)
- Software Engineering Intern - CUDA Test Development (China, Shanghai)
- Software Engineering Intern, AI Engineering - 2025 (China, Shanghai)
- Software Engineering Intern, Autonomous Vehicle Product - 2025 (China, Shanghai)
- Software QA Engineer Intern - 2025 (China, Shanghai)
- Software QA Engineering Intern - 2025 (China, Shanghai)
- Software QA Engineering Intern - 2025 (China, Shanghai)
- System Engineer Intern, Autonomous Vehicles - 2025 (China, Shanghai)
- System Software Engineer Intern - Autonomous Vehicles - 2025 (China, Shanghai)
- System Software Engineer Intern, Apache Spark Solutions - 2025 (China, Shanghai)
- System Software Engineer, GPU Development Tools (China, Shanghai)
- Web Software Development Intern - 2025 (China, Shanghai)
China, Shenzhen
- Customer Program Manager - Auto (China, Shenzhen)
- Customer Technical Program Manager (China, Shenzhen)
- Electronics Failure Analysis Hardware Engineer (China, Shenzhen)
- ICT Test Engineer (China, Shenzhen)
- PCB Layout Engineer - New College Graduate (China, Shenzhen)
- Safety Engineer (China, Shenzhen)
- Senior Component Engineer (China, Shenzhen)
- Senior Product Engineer (China, Shenzhen)
- Senior Product Engineer - Board Products (China, Shenzhen)
- Signal and Power Integrity Engineer (China, Shenzhen)
- Software Engineer Intern, Autonomous Vehicle - 2025 (China, Shenzhen)
- Software Engineering Intern - Autonomous Vehicles (China, Shenzhen)
- Supply Base Engineer (China, Shenzhen)
- System Memory Validation Software Engineer (China, Shenzhen)
- System Software Engineer Intern, Autonomous Vehicles - 2025 (China, Shenzhen)
Denmark, Roskilde
Germany, Remote
Germany, Stuttgart
Hong Kong, Remote
Hong Kong, STP
India, Bengaluru
- AI Developer Technology Engineer (India, Bengaluru)
- ASIC Design Engineer (India, Bengaluru)
- ASIC Design Engineer - Clocks (India, Bengaluru)
- ASIC Design and STA Engineer (India, Bengaluru)
- ASIC Engineer (India, Bengaluru)
- ASIC Engineer - PCIE (India, Bengaluru)
- ASIC Verification Engineer (India, Bengaluru)
- ASIC Verification Engineer (India, Bengaluru)
- ASIC Verification Engineer (India, Bengaluru)
- ASIC Verification Engineer (India, Bengaluru)
- ASIC Verification Engineer - Clocks (India, Bengaluru)
- Architect - GPU Performance Analysis (India, Bengaluru)
- Architect - Tegra (India, Bengaluru)
- Architect, Infrastructure Tools Development – Hardware (India, Bengaluru)
- CAD Layout Design Engineer (India, Bengaluru)
- CPU Verification Engineer (India, Bengaluru)
- CPU Verification Engineer (India, Bengaluru)
- CPU Verification Engineer (India, Bengaluru)
- CPU Verification Engineer (India, Bengaluru)
- CPU Verification Engineer (India, Bengaluru)
- CPU Verification Infrastructure Tools Architect (India, Bengaluru)
- DFT Engineer (India, Bengaluru)
- DFT Engineer - Hardware (India, Bengaluru)
- Deep Learning Engineer, Datacenters (India, Bengaluru)
- Deep Learning Performance Architect (India, Bengaluru)
- Design Engineer - Memory Subsystem (India, Bengaluru)
- Design Verification Engineer - PCIE (India, Bengaluru)
- Design Verification Infrastructure Engineer (India, Bengaluru)
- Design Verification Infrastructure Engineer (India, Bengaluru)
- Developer Relations Manager (India, Bengaluru)
- EDA System Software Engineer (India, Bengaluru)
- EDA Workflow Optimization Engineer (India, Bengaluru)
- Engineering Farm Engineer (India, Bengaluru)
- Enterprise PR Manager, India (India, Bengaluru)
- Financial Reporting Accountant (India, Bengaluru)
- Formal Verification Engineer (India, Bengaluru)
- Formal Verification Engineer (India, Bengaluru)
- GPU ASIC Design Engineer (India, Bengaluru)
- GPU Unit Verification Engineer (India, Bengaluru)
- GPU Unit Verification Engineer (India, Bengaluru)
- GPU Unit Verification Engineer (India, Bengaluru)
- High Speed IO Validation Engineer (India, Bengaluru)
- High Speed IO Validation Engineer (India, Bengaluru)
- Intellectual Property Security Engineer (India, Bengaluru)
- Memory Solutions Engineer (India, Bengaluru)
- PCIe Design Engineer (India, Bengaluru)
- Principal System Architect - Tegra (India, Bengaluru)
- SOC Design Engineer (India, Bengaluru)
- SOC Verification Engineer (India, Bengaluru)
- Senior ASIC Design Engineer - NOC IP (India, Bengaluru)
- Senior ASIC Design and STA Engineer (India, Bengaluru)
- Senior ASIC Verification Engineer - Networking Group (India, Bengaluru)
- Senior Architect - Server Performance (India, Bengaluru)
- Senior Build and Release Methodology Engineer (India, Bengaluru)
- Senior CPU Design Engineer (India, Bengaluru)
- Senior CPU Design Engineer (India, Bengaluru)
- Senior CPU Verification Engineer (India, Bengaluru)
- Senior CPU Verification Engineer (India, Bengaluru)
- Senior CPU and SOC Verification Engineer (India, Bengaluru)
- Senior Data Engineer, Site Reliability Engineering (India, Bengaluru)
- Senior Deep Learning Systems Software Engineer - AI Infrastructure (India, Bengaluru)
- Senior Formal Verification Engineer (India, Bengaluru)
- Senior Mask Designer (India, Bengaluru)
- Senior SOC Design Engineer (India, Bengaluru)
- Senior SOC Memory Subsystem Architect (India, Bengaluru)
- Senior Site Reliability Engineer - AI Research Clusters (India, Bengaluru)
- Senior Site Reliability Engineer - AI Research Clusters (India, Bengaluru)
- Senior Site Reliability Engineer - GPU Cloud (India, Bengaluru)
- Senior Site Reliability Engineer, Data Science and ML Platforms (India, Bengaluru)
- Senior Software Engineer - Backend (India, Bengaluru)
- Senior Software Engineer - Backend (India, Bengaluru)
- Senior Software Engineer - Build and Deployment Tools (India, Bengaluru)
- Senior Software QA Automation Engineer (India, Bengaluru)
- Senior Solutions Architect - Generative AI (India, Bengaluru)
- Senior Solutions Architect - Generative AI (India, Bengaluru)
- Senior System Software Engineer (India, Bengaluru)
- Senior System Software Engineer (India, Bengaluru)
- Senior System Software Engineer, Firmware (India, Bengaluru)
- Senior System Software Engineer, GPU Firmware (India, Bengaluru)
- Senior System Software Engineer, Performance and Optimization - 5G (India, Bengaluru)
- Senior Verification Engineer (India, Bengaluru)
- Senior Verification Engineer - GPU Fullchip (India, Bengaluru)
- Senior Verification Engineer - Memory Subsystem (India, Bengaluru)
- Senior Verification Engineer - Memory Subsystem (India, Bengaluru)
- Senior Verification Engineer - Memory Subsystem (India, Bengaluru)
- Senior Verification Engineer, CPU Performance (India, Bengaluru)
- Senior Verification Engineer, Memory Subsystem (India, Bengaluru)
- Silicon Power Engineer (India, Bengaluru)
- Silicon Solutions Engineer - NPQ (India, Bengaluru)
- Silicon Solutions Lead - Hardware (India, Bengaluru)
- Site Reliability Engineer - GPU Cloud (India, Bengaluru)
- Software Engineer - GPU System Software (India, Bengaluru)
- System Software Architect, Programmable Vision Accelerator (India, Bengaluru)
- System Software Engineer - OpenBMC (India, Bengaluru)
- System Software Engineer, GPU Tools Development (India, Bengaluru)
- Verification Engineer (India, Bengaluru)
- Verification Engineer (India, Bengaluru)
- Verification Engineer, CPU Performance Analysis (India, Bengaluru)
- Verification Engineer, SOC-V (India, Bengaluru)
India, Hyderabad
India, Pune
- Food and Beverage Manager (India, Pune)
- Manager, Tools and Development (India, Pune)
- Senior Autonomous Vehicles Engineer - Mapping and Localization (India, Pune)
- Senior Manager, Compiler Verification (India, Pune)
- Senior Site Reliability Engineer (India, Pune)
- Senior System Software Engineer - GPU Virtualization (India, Pune)
- Software QA Engineer (India, Pune)
- System Software Engineer - GPU Profiling (India, Pune)
- System Software Engineer – Security Tools and Infra (India, Pune)
- Web Application Developer (India, Pune)
India, Remote
Israel, Beer Sheva
Israel, Raanana
- SDK Eth Software Team Manager (Israel, Raanana)
- Senior Analog Mixed Signal Design Engineer (Israel, Raanana)
- Senior Board Design Engineer (Israel, Raanana)
- Senior C++ Software Engineer (Israel, Raanana)
- Senior DevOps Engineer (Israel, Raanana)
- Senior Firmware Verification Engineer (Israel, Raanana)
- Senior Manager, SONiC Software (Israel, Raanana)
- Senior Manager, Software Architecture (Israel, Raanana)
- Senior Python Engineer, Networking (Israel, Raanana)
- Senior Software Engineer - Backend (Israel, Raanana)
- Senior Software Engineer - Ethernet Switch (Israel, Raanana)
- Senior Software Engineer - Ethernet Switch (Israel, Raanana)
- Senior Software Engineer - SONiC Design Group (Israel, Raanana)
- Senior Software Engineer, Linux Kernel Upstream (Israel, Raanana)
- Senior Software QA Automation Engineer (Israel, Raanana)
- Senior Software and Cloud Architect (Israel, Raanana)
- Software Engineer (Israel, Raanana)
- Software Manager, DOCA Verification (Israel, Raanana)
- Software Manager, SONiC Verification - Python (Israel, Raanana)
Israel, Tel Aviv
- Chip Design Architect (Israel, Tel Aviv)
- Chip Design Verification Engineer (Israel, Tel Aviv)
- Clock Design Engineer (Israel, Tel Aviv)
- DFT Engineer, ATPG (Israel, Tel Aviv)
- DFT Verification Engineer (Israel, Tel Aviv)
- Director, Ethernet Solutions Product Management (Israel, Tel Aviv)
- Firmware PHY Verification Engineer (Israel, Tel Aviv)
- Full Chip STA Engineer (Israel, Tel Aviv)
- Manager, DFT Verification (Israel, Tel Aviv)
- Manager, Firmware Verification (Israel, Tel Aviv)
- Manager, Software Engineering (Israel, Tel Aviv)
- Physical Design Backend Engineer (Israel, Tel Aviv)
- Physical Design Backend Engineer (Israel, Tel Aviv)
- Physical Design Backend Engineer (Israel, Tel Aviv)
- Physical Design Backend Engineer (Israel, Tel Aviv)
- Physical Design Engineer (Israel, Tel Aviv)
- Physical Design Engineer (Israel, Tel Aviv)
- Power Integrity Engineer (Israel, Tel Aviv)
- SDK/FW Verification Engineer (Israel, Tel Aviv)
- SOC Clock Distribution Engineer (Israel, Tel Aviv)
- STA Backend Engineer (Israel, Tel Aviv)
- STA Engineer (Israel, Tel Aviv)
- Senior AI System Security Architect - Networking (Israel, Tel Aviv)
- Senior CPU-Memory Management Design Engineer (Israel, Tel Aviv)
- Senior Chip Architect (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer (Israel, Tel Aviv)
- Senior Chip Design Engineer, Formal Verification (Israel, Tel Aviv)
- Senior Chip Design Verification Engineer (Israel, Tel Aviv)
- Senior Chip Design Verification Engineer (Israel, Tel Aviv)
- Senior Chip Design and Verification Engineer (Israel, Tel Aviv)
- Senior DFT Verification Engineer (Israel, Tel Aviv)
- Senior Firmware Design Engineer (Israel, Tel Aviv)
- Senior Firmware Engineer (Israel, Tel Aviv)
- Senior Firmware Engineer (Israel, Tel Aviv)
- Senior Firmware PHY Verification Engineer (Israel, Tel Aviv)
- Senior Formal Verification Engineer (Israel, Tel Aviv)
- Senior Hardware Architect (Israel, Tel Aviv)
- Senior Malware Research Architect (Israel, Tel Aviv)
- Senior Networking Security Research Architect (Israel, Tel Aviv)
- Senior Physical Design Backend Engineer (Israel, Tel Aviv)
- Senior Physical Design Backend Engineer (Israel, Tel Aviv)
- Senior Physical Design Backend Engineer (Israel, Tel Aviv)
- Senior Power Firmware Architect (Israel, Tel Aviv)
- Senior Product Security Architect (Israel, Tel Aviv)
- Senior Research Scientist (Israel, Tel Aviv)
- Senior Research Scientist (Israel, Tel Aviv)
- Senior STA Engineer (Israel, Tel Aviv)
- Senior Software Architect, Accelerated Computing SDN (Israel, Tel Aviv)
- Senior Software Developer (Israel, Tel Aviv)
- Senior Software Engineer (Israel, Tel Aviv)
- Senior Software Engineer (Israel, Tel Aviv)
- Senior Solution Architect, HPC and AI - NVIS (Israel, Tel Aviv)
- Senior System Power and Performance Validation Engineer (Israel, Tel Aviv)
- Senior VLSI Integration Engineer (Israel, Tel Aviv)
- Software Engineer, Chip Design (Israel, Tel Aviv)
- VLSI Integration Engineer (Israel, Tel Aviv)
Israel, Yokneam
- ASIC Design Engineer (Israel, Yokneam)
- Automation Software Engineer (Israel, Yokneam)
- Chip Architect (Israel, Yokneam)
- Chip Design Methodologies Engineer (Israel, Yokneam)
- Chip Design Verification Engineer (Israel, Yokneam)
- Customization and Verification Manager (Israel, Yokneam)
- Firmware Manager (Israel, Yokneam)
- HPC Lab Manager (Israel, Yokneam)
- Hardware Board Design Manager, IC Product (Israel, Yokneam)
- Hardware Senior Manager, Switch Design (Israel, Yokneam)
- IC Practical Engineer (Israel, Yokneam)
- IC Test Program Validation and Verification Engineer (Israel, Yokneam)
- Interconnect Failure Analysis Hardware Engineer (Israel, Yokneam)
- Interconnect Hardware Test Engineer (Israel, Yokneam)
- Manager, Physical Design Power Optimization (Israel, Yokneam)
- Manager, Software Verification (Israel, Yokneam)
- Network QA Engineer (Israel, Yokneam)
- Networking Software and System Architect (Israel, Yokneam)
- Optics Firmware Design Engineer (Israel, Yokneam)
- Optics Firmware Verification Engineer (Israel, Yokneam)
- Optics Firmware Verification Engineer (Israel, Yokneam)
- PCB Layout Design Manager (Israel, Yokneam)
- Physical Design Backend Engineer (Israel, Yokneam)
- Physical Design Backend Engineer (Israel, Yokneam)
- Physical Design CAD Engineer (Israel, Yokneam)
- Physical Design Full Chip STA Engineer (Israel, Yokneam)
- Physical Design Manager (Israel, Yokneam)
- Physical Design Signoff CAD Engineer (Israel, Yokneam)
- Principal Software Architect, Advanced Development (Israel, Yokneam)
- Senior AI and HPC Modelling Architect (Israel, Yokneam)
- Senior ASIC Engineer (Israel, Yokneam)
- Senior ATE to System Correlation Engineer (Israel, Yokneam)
- Senior Architect (Israel, Yokneam)
- Senior Automation Tools Software Engineer (Israel, Yokneam)
- Senior Board Design Engineer (Israel, Yokneam)
- Senior Chip Architect (Israel, Yokneam)
- Senior Chip Design Architect (Israel, Yokneam)
- Senior Chip Design Engineer (Israel, Yokneam)
- Senior DSP Communication Engineer (Israel, Yokneam)
- Senior Data Scientist, Security and Networking Research (Israel, Yokneam)
- Senior DevOps Engineer (Israel, Yokneam)
- Senior DevOps Engineer (Israel, Yokneam)
- Senior Electronics Failure Analysis Hardware Engineer (Israel, Yokneam)
- Senior Firmware Design Engineer (Israel, Yokneam)
- Senior Firmware PHY Developer (Israel, Yokneam)
- Senior Formal Verification Engineer (Israel, Yokneam)
- Senior Functional Test Engineer (Israel, Yokneam)
- Senior Global Capacity Planner (Israel, Yokneam)
- Senior HPC AI Engineer (Israel, Yokneam)
- Senior HPC Cluster Engineer (Israel, Yokneam)
- Senior HPC DevOps Engineer (Israel, Yokneam)
- Senior Hardware Reliability Board Design Engineer (Israel, Yokneam)
- Senior IC Test Engineer (Israel, Yokneam)
- Senior ICT and JTAG Test Engineer (Israel, Yokneam)
- Senior IT Engineer (Israel, Yokneam)
- Senior Layout Engineer (Israel, Yokneam)
- Senior MLOps Engineer - Security and Networking Research (Israel, Yokneam)
- Senior Manager, High-Speed Optical Transceiver Design (Israel, Yokneam)
- Senior Manager, Interconnect Product Engineering (Israel, Yokneam)
- Senior Manager, NPI System Product Engineering (Israel, Yokneam)
- Senior Mechanical Hardware Design Engineer, IC Product (Israel, Yokneam)
- Senior Mechanical Manager (Israel, Yokneam)
- Senior NPI Engineer (Israel, Yokneam)
- Senior Network Algorithms Architect (Israel, Yokneam)
- Senior Network Engineer (Israel, Yokneam)
- Senior Networking Engineer, Next Generation InfiniBand (Israel, Yokneam)
- Senior PCB Design Layout Engineer (Israel, Yokneam)
- Senior Package Layout Engineer (Israel, Yokneam)
- Senior Photonic Layout Design Engineer (Israel, Yokneam)
- Senior Physical Design Full Chip STA Engineer (Israel, Yokneam)
- Senior Physical Design Power Optimization Engineer (Israel, Yokneam)
- Senior Physical Design Verification Layout Engineer (Israel, Yokneam)
- Senior Post-Silicon PHY System Engineer (Israel, Yokneam)
- Senior Production Infrastructure Equipment Engineer (Israel, Yokneam)
- Senior Production Manager (Israel, Yokneam)
- Senior Project Manager, ICPE (Israel, Yokneam)
- Senior Signal and Power Integrity Engineer (Israel, Yokneam)
- Senior Silicon Photonics Power Characterization and Validation Engineer (Israel, Yokneam)
- Senior Software Architect, AI Networking (Israel, Yokneam)
- Senior Software Architect, Advanced Development (Israel, Yokneam)
- Senior Software CAD and Methodologies Engineer (Israel, Yokneam)
- Senior Software Developer (Israel, Yokneam)
- Senior Software Developer, Network Driver (Israel, Yokneam)
- Senior Software Engineer (Israel, Yokneam)
- Senior Software Engineer (Israel, Yokneam)
- Senior Software Engineer (Israel, Yokneam)
- Senior Software Engineer - Networking, SAI (Israel, Yokneam)
- Senior Software Engineer - Switch Simulation (Israel, Yokneam)
- Senior Software Engineer - System Customization Team (Israel, Yokneam)
- Senior Software Research Architect (Israel, Yokneam)
- Senior Software Test Development Engineer (Israel, Yokneam)
- Senior Software Validation Engineer (Israel, Yokneam)
- Senior Software Verification Engineer (Israel, Yokneam)
- Senior Software Verification Engineer (Israel, Yokneam)
- Senior Software Verification Engineer - Switch Simulation (Israel, Yokneam)
- Senior Switch Prel Materials Program Manager (Israel, Yokneam)
- Senior System Design Test Architect (Israel, Yokneam)
- Senior System Product Engineer (Israel, Yokneam)
- Senior System Software Architect, HPC Networking (Israel, Yokneam)
- Senior System Test Design Engineer (Israel, Yokneam)
- Senior System Validation Engineer (Israel, Yokneam)
- Senior System Validation Engineer (Israel, Yokneam)
- Senior Test Product Engineer (Israel, Yokneam)
- Senior Video Compression Architect (Israel, Yokneam)
- Signal and Power Integrity Student (Israel, Yokneam)
- Software Linux Engineer (Israel, Yokneam)
- Software Manager, Golang Kubernetes (Israel, Yokneam)
- Software Test Development Engineer (Israel, Yokneam)
- Software Test Development Engineer (Israel, Yokneam)
- Software Verification Manager (Israel, Yokneam)
- Stress Simulation Engineer - Test (Israel, Yokneam)
- System Linux Administrator (Israel, Yokneam)
- Technical Project Lead, SPE (Israel, Yokneam)
- Validation and Verification Interconnect Engineer (Israel, Yokneam)
Japan, Tokyo
- AI Developer Technology Engineer (Japan, Tokyo)
- Deep Learning Engineer, Generative AI and 3D Reconstruction (Japan, Tokyo)
- Deep Learning Engineer, Generative AI and 3D Reconstruction (Japan, Tokyo)
- Deep-Learning Software Engineer, Performance Optimization (Japan, Tokyo)
- HR Manager, Japan (Japan, Tokyo)
- Senior Business Development Manager - Robotics (Japan, Tokyo)
- Senior Consumer Sales Manager (Japan, Tokyo)
- Senior Developer Relations Manager - Manufacturing (Japan, Tokyo)
- Senior Developer Relations Manager - Robotics (Japan, Tokyo)
- Senior Partner Business Manager - WWFO (Japan, Tokyo)
- Solution Architect - NVIDIA Cloud Partners Infrastructure (Japan, Tokyo)
- Solution Architect, Automotive (Japan, Tokyo)
- Solution Architect, DGX Cloud (Japan, Tokyo)
Korea, Remote
Korea, Seoul
New Zealand, Remote
Poland, Remote
Poland, Warsaw
Singapore, Remote
Singapore, Singapore-Suntec Tower
Switzerland, Zurich
Taiwan, Hsinchu
- AI Algorithms SW Engineer (RDSS Intern) (Taiwan, Hsinchu)
- AI Algorithms Software Engineer (RDSS Intern) (Taiwan, Hsinchu)
- ASIC Physical Design Intern - 2025 (Taiwan, Hsinchu)
- CAD Developer, Timing and Physical Design Optimization (Taiwan, Hsinchu)
- Data Systems Analyst (RDSS Intern) (Taiwan, Hsinchu)
- Design Verification Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Digital Circuit Design Engineer (Taiwan, Hsinchu)
- Fulfillment Analyst (RDSS Intern) (Taiwan, Hsinchu)
- Manager, Design Verification (Taiwan, Hsinchu)
- Mixed Signal Analog Circuit Designer (RDSS Intern) (Taiwan, Hsinchu)
- Mixed Signal Circuit Design Intern - 2025 (Taiwan, Hsinchu)
- Mixed Signal Circuit Designer (RDSS Intern) (Taiwan, Hsinchu)
- Mixed Signal Circuit Designer Intern (Taiwan, Hsinchu)
- Mixed Signal Design Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Mixed-Signal Circuit Design Engineer - New College Graduate (Taiwan, Hsinchu)
- Product Development Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Product Test Engineer (Taiwan, Hsinchu)
- Product Test Engineer (Taiwan, Hsinchu)
- Product Test Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Product Test Engineer (RDSS Intern) - 2025 (Taiwan, Hsinchu)
- Product Test Hardware Engineer (Taiwan, Hsinchu)
- Senior ASIC Engineer (Taiwan, Hsinchu)
- Senior Design Engineer, Coherent High Speed Interconnect (Taiwan, Hsinchu)
- Senior Digital Design Verification Engineer - Hardware (Taiwan, Hsinchu)
- Senior Mask Layout Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Circuit Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Engineer (Taiwan, Hsinchu)
- Senior Mixed Signal Design Verification Engineer (Taiwan, Hsinchu)
- Senior Optical Product Test Development Engineer (Taiwan, Hsinchu)
- Senior Physical Design Engineer (Taiwan, Hsinchu)
- Senior Product Test Engineer (Taiwan, Hsinchu)
- Senior Silicon Photonics Test Engineer (Taiwan, Hsinchu)
- Senior Technical Program Manager - ASIC (Taiwan, Hsinchu)
- Senior Verification Engineer (Taiwan, Hsinchu)
- Silicon Photonics Test Engineer (Taiwan, Hsinchu)
- Structural Test Engineer (Taiwan, Hsinchu)
- Structural Test Engineer (RDSS Intern) (Taiwan, Hsinchu)
- Test Floor Engineer (Taiwan, Hsinchu)
- Test Floor Product Engineer (Taiwan, Hsinchu)
- VLSI Physical Design CAD Intern - Summer 2025 (Taiwan, Hsinchu)
Taiwan, Taipei
- AI Computing Software Development Engineer, TensorRT (Taiwan, Taipei)
- AI Computing Software Engineering Intern, TensorRT (Taiwan, Taipei)
- Android Software Engineer (RDSS Intern) (Taiwan, Taipei)
- Android Software Engineering Intern - 2025 (Taiwan, Taipei)
- Artificial Intelligence Research Intern - Deep Learning (Taiwan, Taipei)
- BMC Firmware Developer (Taiwan, Taipei)
- BaseOS Foundry Engineer (RDSS Intern) (Taiwan, Taipei)
- Consumer Community Manager - Taiwan (Taiwan, Taipei)
- Customer Program Manager (Taiwan, Taipei)
- DFX Engineer - New College Graduate (Taiwan, Taipei)
- DFX Software Engineer (RDSS Intern) (Taiwan, Taipei)
- Data Engineer (Taiwan, Taipei)
- Data Scientist (Taiwan, Taipei)
- Director, AI Software (Taiwan, Taipei)
- EMC Engineer (Taiwan, Taipei)
- Enterprise Marketing Manager (Taiwan, Taipei)
- Enterprise PR Manager, Taiwan (Taiwan, Taipei)
- Enterprise Partner Marketing Manager (Taiwan, Taipei)
- Enterprise Software Test Development Engineer (RDSS Intern) (Taiwan, Taipei)
- Enterprise Software Test Development Engineer (RDSS Intern) (Taiwan, Taipei)
- GPU Firmware Engineer (RDSS Intern) (Taiwan, Taipei)
- GenAI and MLOps Intern - Spring 2025 (Taiwan, Taipei)
- MCU Firmware Engineer (Taiwan, Taipei)
- Mixed Signal Design Engineer (RDSS Intern) (Taiwan, Taipei)
- Payroll Manager (Taiwan, Taipei)
- Performance Software Engineering Intern - 2025 (Taiwan, Taipei)
- Regional Planner (Taiwan, Taipei)
- Research Intern, Deep Learning and Artificial Intelligence - 2025 (Taiwan, Taipei)
- Research Scientist - Design Automation (Taiwan, Taipei)
- Research Scientist, Circuits (Taiwan, Taipei)
- Research Scientist, Deep Learning and Computer Vision (Taiwan, Taipei)
- SRE Software Engineer, Storage and Data (Taiwan, Taipei)
- Safety Engineer (Taiwan, Taipei)
- Security System Software Engineer (RDSS Intern) (Taiwan, Taipei)
- Senior ASIC Verification Engineer, Coherent High Speed Interconnect (Taiwan, Taipei)
- Senior BMC Firmware Developer (Taiwan, Taipei)
- Senior Customer Technical Program Manager (Taiwan, Taipei)
- Senior Generalist Software Engineer -- Omniverse (Taiwan, Taipei)
- Senior Mask Layout Engineer (Taiwan, Taipei)
- Senior Mixed Signal Designer Engineer (Taiwan, Taipei)
- Senior Performance Software Engineer (Taiwan, Taipei)
- Senior Silicon Validation and Productization Engineer (Taiwan, Taipei)
- Senior Software Engineer – Simulation and Virtualization (Taiwan, Taipei)
- Senior System Application Engineer (Taiwan, Taipei)
- Senior Technical Program Manager - Deep Learning Enterprise Server Software (Taiwan, Taipei)
- Senior Tool and Methodology Development Software Engineer (Taiwan, Taipei)
- Signal and Power Integrity Engineer (RDSS Intern) (Taiwan, Taipei)
- Silicon Validation Engineer (RDSS Intern) (Taiwan, Taipei)
- Software Engineering Intern - OpenBMC (Taiwan, Taipei)
- Software Engineering, Autonomous Vehicles (RDSS Intern) (Taiwan, Taipei)
- Software Program Manager (Taiwan, Taipei)
- Solutions Architect (Taiwan, Taipei)
- Solutions Architect, Data Science (Taiwan, Taipei)
- System Software Application Engineer (Taiwan, Taipei)
- System Software Engineer (RDSS Intern) – Embedded and Automotive Power Management (Taiwan, Taipei)
- System Software Engineer - Base OS (RDSS Intern) (Taiwan, Taipei)
- System Software Engineer - USB (RDSS Intern) (Taiwan, Taipei)
- System Software Engineer – Embedded Power Management (RDSS Intern) (Taiwan, Taipei)
- System Software Engineer, GPU Server Diag - New College Graduate (Taiwan, Taipei)
- System Software Engineering Intern - 2025 (Taiwan, Taipei)
- System Software Engineering Intern, GPU - 2025 (Taiwan, Taipei)
- Technical Marketing Manager (Taiwan, Taipei)
- Tegra Software Engineer (RDSS Intern) (Taiwan, Taipei)
UK, Belfast
UK, Remote
US, AR, Remote
US, CA, Remote
- Developer Relationship Manager - GSI (US, CA, Remote)
- Manager, Artificial Intelligence Algorithms (US, CA, Santa Clara)
- Senior AI Instructor (US, CA, Remote)
- Senior Network Storage Engineer (US, CA, Remote)
- Senior Software Engineer (US, CA, Remote)
- Senior Software Engineer, Observability and AIOps (US, CA, Remote)
- Senior Solutions Architect, Retail (US, CA, Remote)
- Senior System Software Engineer - Triton Inference Server (US, CA, Remote)
- Software Engineering Manager - Image and Data Compression Libraries (US, CA, Remote)
- Software Engineering Manager - Libraries (US, CA, Santa Clara)
- Software Platform Support Engineer - GPU Cloud (US, CA, Remote)
- Solutions Architect, Retail Data Science (US, CA, Remote)
- Technical Marketing Engineer, CUDA-X Accelerated Libraries (US, CA, Remote)
US, CA, Santa Clara
- AI Networking Software Developer (US, CA, Santa Clara)
- AI and ML Infra Engineer, Research Clusters (US, CA, Santa Clara)
- ASIC Design Engineer (US, CA, Santa Clara)
- ASIC Design Engineer - New College Grad 2024 (US, CA, Santa Clara)
- ASIC Verification Engineer - GPU (US, CA, Santa Clara)
- ATE Test Development Engineer (US, CA, Santa Clara)
- ATE Test Development Engineer (US, CA, Santa Clara)
- Accounts Payable Specialist (US, CA, Santa Clara)
- Applied Deep Learning Research Scientist, Sparsity (US, CA, Santa Clara)
- Automotive DriveOS Software Architect (US, CA, Santa Clara)
- Channel Communications Manager (US, CA, Santa Clara)
- Corporate Development Manager (US, CA, Santa Clara)
- Customer Program Manager (US, CA, Santa Clara)
- Data Center System Software Architect, DGX Cloud (US, CA, Santa Clara)
- Datacenter GPU Power Architect (US, CA, Santa Clara)
- Deep Learning Engineer - Distributed Task-Based Backends (US, CA, Santa Clara)
- Deep Learning Performance Architect (US, CA, Santa Clara)
- Developer Advocate Engineer (US, CA, Santa Clara)
- Developer Relations Manager - CSP and Hyperscale (US, CA, Santa Clara)
- Developer Relations Manager - GenAI for Automotive (US, CA, Santa Clara)
- Developer Relations Manager, EDA (US, CA, Santa Clara)
- Developer Technology Intern, AI - Summer 2025 (US, CA, Santa Clara)
- Developer Technology Intern, High-Performance Databases - Summer 2025 (US, CA, Santa Clara)
- Director of Enterprise Training Operations (US, CA, Santa Clara)
- Director of Product Management – Generative AI for Games (US, CA, Santa Clara)
- Director of Product Management, Climate and Weather (US, CA, Santa Clara)
- Director, Interconnect System Sourcing (US, CA, Santa Clara)
- Director, Investor Relations (US, CA, Santa Clara)
- Director, Security Systems and Technology (US, CA, Santa Clara)
- Distinguished Engineer – Data Center System Software Architect (US, CA, Santa Clara)
- Distinguished Engineer, AI Resiliency Lead (US, CA, Santa Clara)
- Distinguished Software Architect - Deep Learning and HPC Communications (US, CA, Santa Clara)
- Formal Verification Intern - Summer 2025 (US, CA, Santa Clara)
- GPU Verification Architect (US, CA, Santa Clara)
- Gen AI Product Evangelist Engineer, Retail (US, CA, Santa Clara)
- Gen AI Product Evangelist Engineer, Retail (US, CA, Santa Clara)
- Global Alliance Manager, Developer Relations - Adobe (US, CA, Santa Clara)
- Global Commodity Manager, Packaging (US, CA, Santa Clara)
- Global Developer Relations Account Manager – Ansys (US, CA, Santa Clara)
- Global Head of Business Development, Financial Services (US, CA, Santa Clara)
- Global System Integrators, Business Development (US, CA, Santa Clara)
- HPC Operations Manager – Hardware Engineering (US, CA, Santa Clara)
- Hardware Validation Engineer (US, CA, Santa Clara)
- Keynote Operations Manager (US, CA, Santa Clara)
- Linear Algebra Primitives, Product Manager (US, CA, Santa Clara)
- Machine Learning Software Platform Architect (US, CA, Santa Clara)
- Manager, Deep Learning Algorithms (US, CA, Santa Clara)
- Manager, Developer Technology (US, CA, Santa Clara)
- Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes (US, CA, Santa Clara)
- Manager, Engineering Product (US, CA, Santa Clara)
- Manager, Materials Planning Management (US, CA, Santa Clara)
- Manager, SoC Architecture (US, CA, Santa Clara)
- Manager, Speed and Reliability (US, CA, Santa Clara)
- Material Planner (US, CA, Santa Clara)
- Mechanical and Thermal Program Manager (US, CA, Santa Clara)
- Mixed Signal Design Engineer (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Artificial Intelligence and Deep Learning (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Computer Architecture (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Deep Learning Computer Architecture (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Hardware ASIC Design (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Hardware Engineering (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Hardware Physical Design / VLSI (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Hardware Verification (US, CA, Santa Clara)
- NVIDIA 2025 Internships: MBA Business Operations (US, CA, Santa Clara)
- NVIDIA 2025 Internships: MBA Product Management (US, CA, Santa Clara)
- NVIDIA 2025 Internships: MBA Product Marketing Management (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Mixed Signal / Circuit Design (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Software Engineering (US, CA, Santa Clara)
- NVIDIA 2025 Internships: Systems Software Engineering (US, CA, Santa Clara)
- Network Products Customer Quality Engineer (US, CA, Santa Clara)
- Network Products Customer Quality Engineer, RMA (US, CA, Santa Clara)
- Offensive Hardware Security Researcher (US, CA, Santa Clara)
- Performance Engineer - Deep Learning (US, CA, Santa Clara)
- PhD Research Intern, Computer Architecture and Systems - 2025 (US, CA, Santa Clara)
- PhD Research Intern, Computer Vision and Deep Learning - 2025 (US, CA, Santa Clara)
- PhD Research Intern, Generative AI - 2025 (US, CA, Santa Clara)
- PhD Research Intern, Graphics - 2025 (US, CA, Santa Clara)
- PhD Research Intern, Large Language Models - 2025 (US, CA, Santa Clara)
- PhD Research Intern, Robotics and/or Autonomous Vehicles - 2025 (US, CA, Santa Clara)
- Physical Security Network Architect (US, CA, Santa Clara)
- Platform Program Manager, AI Computing Infrastructure (US, CA, Santa Clara)
- Policy Research Intern, Geopolitical AI and Cloud - Summer 2025 (US, CA, Santa Clara)
- Principal Engineer - DL and AI Software (US, CA, Santa Clara)
- Principal Engineer for AI Software Resiliency (US, CA, Santa Clara)
- Principal Engineer, Agentic System Architecture (US, CA, Santa Clara)
- Principal Firmware Engineer - Data Center Server Management (US, CA, Santa Clara)
- Principal Graphics Hardware Architect (US, CA, Santa Clara)
- Principal Platform Software Engineer - Platform Architect (US, CA, Santa Clara)
- Principal Software Engineer - Enterprise AI Platform (US, CA, Santa Clara)
- Principal Speed and Reliability Engineer (US, CA, Santa Clara)
- Principal Thermal Mechanical Photonic Designer (US, CA, Santa Clara)
- Product Manager- Data Center Ecosystem (US, CA, Santa Clara)
- Product Marketing Manager - TensorRT-LLM (US, CA, Santa Clara)
- Research Scientist, AI Accelerator SW HW Codesign - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, ASIC and VLSI - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Circuits - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Digital Humans - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Efficient Deep Learning - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Fundamental Generative AI - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Fundamental LLM Research for Knowledge, Reasoning, and Agents - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Generalist Embodied Agent Research - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Generative AI for Physical AI - New College Grad 2025 (US, CA, Santa Clara)
- Research Scientist, Network - New College Grad 2025 (US, CA, Santa Clara)
- Risk Manager (US, CA, Santa Clara)
- Senior AI-HPC Cluster Engineer (US, CA, Santa Clara)
- Senior AI-HPC Storage Engineer (US, CA, Santa Clara)
- Senior ASIC Design Engineer (US, CA, Santa Clara)
- Senior ASIC Design Engineer (US, CA, Santa Clara)
- Senior ASIC Design Engineer (US, CA, Santa Clara)
- Senior ASIC Design Engineer - Memory Controller (US, CA, Santa Clara)
- Senior ASIC Design Verification Engineer (US, CA, Santa Clara)
- Senior ASIC Floorplan Design Engineer (US, CA, Santa Clara)
- Senior ASIC Front End Infrastructure Engineer (US, CA, Santa Clara)
- Senior ASIC Physical Design Engineer - High Performance Designs (US, CA, Santa Clara)
- Senior ASIC Physical Design Engineer, Netlisting (US, CA, Santa Clara)
- Senior ASIC Power Engineer (US, CA, Santa Clara)
- Senior ASIC Timing Engineer (US, CA, Santa Clara)
- Senior ASIC Verification Engineer (US, CA, Santa Clara)
- Senior ASIC Verification Engineer (US, CA, Santa Clara)
- Senior ASIC Verification Engineer (US, CA, Santa Clara)
- Senior ASIC Verification Engineer - GPU (US, CA, Santa Clara)
- Senior ASIC Verification Engineer, Coherent High Speed Interconnect (US, CA, Santa Clara)
- Senior Account Manager - Global AI Data Center and Cooling Strategies (US, CA, Santa Clara)
- Senior Account Manager, Global AI Data Center Infrastructure Strategies (US, CA, Santa Clara)
- Senior Account Manager, Global AI Data Center and Enterprise Strategies (US, CA, Santa Clara)
- Senior Account Manager, Global Data Center and NCP Strategies (US, CA, Santa Clara)
- Senior Applied LLM Engineer, AI – Chip Design (US, CA, Santa Clara)
- Senior Applied Power Architect - GPU (US, CA, Santa Clara)
- Senior Architect - NVIDIA Architecture (US, CA, Santa Clara)
- Senior Architect, GPU and SoC Modelling (US, CA, Santa Clara)
- Senior Ballout Designer (US, CA, Santa Clara)
- Senior Buyer (US, CA, Santa Clara)
- Senior C++ Software Engineer - Chip Design Tools (US, CA, Santa Clara)
- Senior C++ Software Engineer - Chip Design Tools (US, CA, Santa Clara)
- Senior CAD Developer, Timing Optimization Tools (US, CA, Santa Clara)
- Senior CPU Fabric Architect (US, CA, Santa Clara)
- Senior CPU Implementation Methodology Engineer (US, CA, Santa Clara)
- Senior CUDA Compute Systems Software Engineer (US, CA, Santa Clara)
- Senior Channel Communications Manager (US, CA, Santa Clara)
- Senior Circuit Design Engineer (US, CA, Santa Clara)
- Senior Circuit Design Engineer (US, CA, Santa Clara)
- Senior Circuit Design Engineer - Power Modeling and Simulation (US, CA, Santa Clara)
- Senior Cloud Networking Acceleration Architect (US, CA, Santa Clara)
- Senior Compiler Engineer, Software - Deep Learning Accelerator (US, CA, Santa Clara)
- Senior Computer Architect - Deep Learning (US, CA, Santa Clara)
- Senior DL Algorithms Engineer - Inference Optimizations (US, CA, Santa Clara)
- Senior Datacenter GPU Power Architect (US, CA, Santa Clara)
- Senior Deep Learning Performance Architect (US, CA, Santa Clara)
- Senior Deep Learning Software Engineer (US, CA, Santa Clara)
- Senior Deep Learning Software Engineer, Inference (US, CA, Santa Clara)
- Senior Deep Learning Software Engineer, cuDNN (US, CA, Santa Clara)
- Senior Design Engineer (US, CA, Santa Clara)
- Senior Design for Debug Architect and Methodology Engineer (US, CA, Santa Clara)
- Senior DevOps Engineer, Deep Learning Frameworks (US, CA, Santa Clara)
- Senior DevOps and Release Engineer (US, CA, Santa Clara)
- Senior Developer Technology Engineer - AI (US, CA, Santa Clara)
- Senior Developer Technology Engineer, High-Performance Databases (US, CA, Santa Clara)
- Senior Digital Circuit Design Engineer (US, CA, Santa Clara)
- Senior Digital Design Verification Engineer - Hardware (US, CA, Santa Clara)
- Senior Director - Deals Desk (US, CA, Santa Clara)
- Senior Director, PR Enterprise (US, CA, Santa Clara)
- Senior Distributed Storage Engineer (US, CA, Santa Clara)
- Senior Emulation Power Engineer (US, CA, Santa Clara)
- Senior Failure Analysis Engineer (US, CA, Santa Clara)
- Senior Failure Analysis Solutions Developer (US, CA, Santa Clara)
- Senior Field Application Engineer (US, CA, Santa Clara)
- Senior Financial Analyst (US, CA, Santa Clara)
- Senior Financial Analyst (US, CA, Santa Clara)
- Senior Financial Reporting Analyst (US, CA, Santa Clara)
- Senior Firmware Architect - Server Manageability (US, CA, Santa Clara)
- Senior Firmware Engineer - Embedded Controller (US, CA, Santa Clara)
- Senior Firmware Engineer - Memory Subsystem (US, CA, Santa Clara)
- Senior GPU Architect (US, CA, Santa Clara)
- Senior GPU Cluster Tools Developer (US, CA, Santa Clara)
- Senior GPU Hardware Security Architect, Memory Security and System Configuration (US, CA, Santa Clara)
- Senior GPU Kernel Performance Lead (US, CA, Santa Clara)
- Senior GPU Low Power Architect (US, CA, Santa Clara)
- Senior GPU Power Architect (US, CA, Santa Clara)
- Senior GPU System Software Engineer (US, CA, Santa Clara)
- Senior Global Business Development Manager – AI RAN (US, CA, Santa Clara)
- Senior Graphics Architect - Hardware (US, CA, Santa Clara)
- Senior HPC AI Cluster Engineer (US, CA, Santa Clara)
- Senior HPC Performance Engineer (US, CA, Santa Clara)
- Senior HPC and AI Networking Performance Research and Analysis Engineer (US, CA, Santa Clara)
- Senior Hardware Security Architect, GPU Security Verification (US, CA, Santa Clara)
- Senior Hardware SoC Architect (US, CA, Santa Clara)
- Senior Hardware Validation Engineer (US, CA, Santa Clara)
- Senior High-Performance LLM Training Engineer (US, CA, Santa Clara)
- Senior Hypervisor and RTOS Engineer (US, CA, Santa Clara)
- Senior Internal Auditor (US, CA, Santa Clara)
- Senior Logic Design Engineer, Cache Coherent Interconnects (US, CA, Santa Clara)
- Senior Logic Design Engineer– Physical Design (US, CA, Santa Clara)
- Senior Manager, Client Platform Engineering (US, CA, Santa Clara)
- Senior Manager, Device and Modeling (US, CA, Santa Clara)
- Senior Manager, Hardware Engineering (US, CA, Santa Clara)
- Senior Manager, Software Engineering (US, CA, Santa Clara)
- Senior Manager, Vendor Management (US, CA, Santa Clara)
- Senior Mask Design Engineer (US, CA, Santa Clara)
- Senior Mask Design Engineer (US, CA, Santa Clara)
- Senior Mask Design Engineer - Hardware (US, CA, Santa Clara)
- Senior Mask Design Engineer - Hardware (US, CA, Santa Clara)
- Senior Mask Design Engineer - Hardware (US, CA, Santa Clara)
- Senior Mask Design Engineer - Hardware (US, CA, Santa Clara)
- Senior Mask Layout Design Engineer (US, CA, Santa Clara)
- Senior Mask Layout Design Engineer (US, CA, Santa Clara)
- Senior Math Libraries Engineer - Dense Linear Algebra (US, CA, Santa Clara)
- Senior Math Libraries Engineer - Sparse Linear Algebra (US, CA, Santa Clara)
- Senior Math Libraries Engineer – AI and HPC (US, CA, Santa Clara)
- Senior Math Libraries Engineer – Quantum Computing (US, CA, Santa Clara)
- Senior Math Libraries Engineers - Python APIs (US, CA, Santa Clara)
- Senior Memory Controller Verification Engineer (US, CA, Santa Clara)
- Senior Memory Post Silicon Qualification Engineer (US, CA, Santa Clara)
- Senior Memory System Architect (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed-Signal Design Engineer (US, CA, Santa Clara)
- Senior Mixed-Signal Design Verification Engineer (US, CA, Santa Clara)
- Senior Networking Architect (US, CA, Santa Clara)
- Senior Networking Architect (US, CA, Santa Clara)
- Senior Observability Architect, AI and HPC (US, CA, Santa Clara)
- Senior Observability Engineer, AI and HPC (US, CA, Santa Clara)
- Senior Optical MSDV Hardware Engineer (US, CA, Santa Clara)
- Senior Performance Engineer - Deep Learning (US, CA, Santa Clara)
- Senior Photonic Device Designer (US, CA, Santa Clara)
- Senior Photonic Layout Design Engineer (US, CA, Santa Clara)
- Senior Physical Design Engineer (US, CA, Santa Clara)
- Senior Physical Design Methodology Engineer (US, CA, Santa Clara)
- Senior Physical Design Methodology Engineer, Innovus Flows (US, CA, Santa Clara)
- Senior Physical Design Methodology Engineer, PPA Improvement Technology Scaling (US, CA, Santa Clara)
- Senior Platform Software Engineer, AI Server - GPU (US, CA, Santa Clara)
- Senior Post Silicon Hardware Engineer (US, CA, Santa Clara)
- Senior Power Architecture and Optimization Engineer (US, CA, Santa Clara)
- Senior Power Integrity Engineer (US, CA, Santa Clara)
- Senior Power and Thermal Engineer (US, CA, Santa Clara)
- Senior Pricing System Analyst (US, CA, Santa Clara)
- Senior Product Architect (US, CA, Santa Clara)
- Senior Product Manager – AI Networking Orchestration (US, CA, Santa Clara)
- Senior Product Manager, AI for Chip Design (US, CA, Santa Clara)
- Senior Product Manager, NVCF - Capacity Management and Marketplaces (US, CA, Santa Clara)
- Senior Product Manager, NVCF - Infrastructure and Sovereign AI (US, CA, Santa Clara)
- Senior Product Marketing Manager, GPUs (US, CA, Santa Clara)
- Senior Product Quality Engineer (US, CA, Santa Clara)
- Senior Production SRE Engineer - Storage (US, CA, Santa Clara)
- Senior RTL Analysis Methodology Engineer (US, CA, Santa Clara)
- Senior Reliability Engineer (US, CA, Santa Clara)
- Senior Research Engineer for Reinforcement Learning (US, CA, Santa Clara)
- Senior Research Engineer, Foundation Model Training Infrastructure (US, CA, Santa Clara)
- Senior Research Engineer, ML Data Pipelines (US, CA, Santa Clara)
- Senior Research Engineer, Simulation (US, CA, Santa Clara)
- Senior SOC Design Engineer (US, CA, Santa Clara)
- Senior SRAM Engineer, Circuit Design (US, CA, Santa Clara)
- Senior Salesforce Business Systems Analyst (US, CA, Santa Clara)
- Senior Security Engineer, Purple Team - GPU Firmware (US, CA, Santa Clara)
- Senior Server Firmware Engineer - SBIOS (US, CA, Santa Clara)
- Senior Signal Integrity Design Engineer (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer - Hardware (US, CA, Santa Clara)
- Senior Signal and Power Integrity Engineer - Hardware (US, CA, Santa Clara)
- Senior Silicon Low Power Development Engineer (US, CA, Santa Clara)
- Senior Site Reliability Engineer (US, CA, Santa Clara)
- Senior Site Reliability Engineer - GPU Clusters (US, CA, Santa Clara)
- Senior Site Reliability Engineer - Internal AI Research Clusters (US, CA, Santa Clara)
- Senior SoC Power Analysis Engineer (US, CA, Santa Clara)
- Senior SoC Power Architect (US, CA, Santa Clara)
- Senior Software Architect - Data Center Systems (US, CA, Santa Clara)
- Senior Software Architect - Deep Learning and HPC Communications (US, CA, Santa Clara)
- Senior Software Architect, AI and HPC (US, CA, Santa Clara)
- Senior Software Architect, Advanced Development (US, CA, Santa Clara)
- Senior Software Developer (US, CA, Santa Clara)
- Senior Software Developer, HPC Cluster Management (US, CA, Santa Clara)
- Senior Software Engineer - Automated Parallel Programming (US, CA, Santa Clara)
- Senior Software Engineer - CUDA Python (US, CA, Santa Clara)
- Senior Software Engineer - DOCA (US, CA, Santa Clara)
- Senior Software Engineer - Data Center Rack and Power Management Engineering (US, CA, Santa Clara)
- Senior Software Engineer - Data Center System Bringup (US, CA, Santa Clara)
- Senior Software Engineer - HPC (US, CA, Santa Clara)
- Senior Software Engineer - NVLINK NOS (US, CA, Santa Clara)
- Senior Software Engineer - Python Numerical Computing Libraries (US, CA, Santa Clara)
- Senior Software Engineer - RTL Design Tools (US, CA, Santa Clara)
- Senior Software Engineer – Build Tools (US, CA, Santa Clara)
- Senior Software Engineer – Simulation and Virtualization (US, CA, Santa Clara)
- Senior Software Engineer, AI (US, CA, Santa Clara)
- Senior Software Engineer, Bare Metal Automation - DGX Cloud (US, CA, Santa Clara)
- Senior Software Engineer, Distributed Task-based Runtimes (US, CA, Santa Clara)
- Senior Software Engineer, Fabric Networking - GPU (US, CA, Santa Clara)
- Senior Software Engineer, GPU Communications and Networking (US, CA, Santa Clara)
- Senior Software Engineer- Windows for ARM and TEGRA (US, CA, Santa Clara)
- Senior Software Product Manager, Nemo LLM Microservices (US, CA, Santa Clara)
- Senior Software Program Manager - Datacenter Compute Server Accelerators (US, CA, Santa Clara)
- Senior Software Security Architect (US, CA, Santa Clara)
- Senior Software Technical Program Manager - Compute Software Technologies (US, CA, Santa Clara)
- Senior Software and System Architect (US, CA, Santa Clara)
- Senior Solutions Architect, Gen AI Manufacturing (US, CA, Santa Clara)
- Senior Solutions Architect, Generative AI - Inference (US, CA, Santa Clara)
- Senior Solutions Architect, Global Partner Team (US, CA, Santa Clara)
- Senior Solutions Architect, Global Partner Team (US, CA, Santa Clara)
- Senior Solutions Architect, Global Partner Team (US, CA, Santa Clara)
- Senior Solutions Architect, HPC and AI (US, CA, Santa Clara)
- Senior Solutions Architect, Networking (US, CA, Santa Clara)
- Senior Solutions Architect, Networking (US, CA, Santa Clara)
- Senior Staff Application Engineer (US, CA, Santa Clara)
- Senior Staff Site Reliability Engineer, Database Platform (US, CA, Santa Clara)
- Senior Staff Software Engineer (US, CA, Santa Clara)
- Senior Supplier Quality Engineer (US, CA, Santa Clara)
- Senior Synthesis Flow CAD Engineer (US, CA, Santa Clara)
- Senior System Architect, GPU (US, CA, Santa Clara)
- Senior System Boot Engineer (US, CA, Santa Clara)
- Senior System Level Product Engineer (US, CA, Santa Clara)
- Senior System Level Testability Lead (US, CA, Santa Clara)
- Senior System Power Management Engineer (US, CA, Santa Clara)
- Senior System Power Validation and Applications Engineer (US, CA, Santa Clara)
- Senior System Profiling Software Engineer (US, CA, Santa Clara)
- Senior System Quality Architect - Power, Thermal and Packaging (US, CA, Santa Clara)
- Senior System Software Engineer (US, CA, Santa Clara)
- Senior System Software Engineer - Microcontroller Firmware (US, CA, Santa Clara)
- Senior System Software Engineer - QNX BSP and IO Virtualization (US, CA, Santa Clara)
- Senior System Software Engineer - Scientific Computing PaaS (US, CA, Santa Clara)
- Senior System Software Engineer - SoC Power (US, CA, Santa Clara)
- Senior System Software Engineer - Tegra (US, CA, Santa Clara)
- Senior System Software Engineer Platform - Microcontroller Development (US, CA, Santa Clara)
- Senior System Software Engineer Platform - OpenBMC (US, CA, Santa Clara)
- Senior System Software Engineer, Base OS Kernel (US, CA, Santa Clara)
- Senior System Software Engineer, Deep Learning Accelerator (US, CA, Santa Clara)
- Senior System Software Engineer, Distributed Systems - DGX Cloud (US, CA, Santa Clara)
- Senior System Software Engineer, GPU Server (US, CA, Santa Clara)
- Senior System Software Engineer, NCCL - Partner Enablement (US, CA, Santa Clara)
- Senior Systems Software Engineer, CUDA Driver (US, CA, Santa Clara)
- Senior Systems Software Engineer, Data Center - CUDA (US, CA, Santa Clara)
- Senior Systems Software Engineer, TAO Deep Learning (US, CA, Santa Clara)
- Senior Systems Solutions Architect (US, CA, Santa Clara)
- Senior Technical Marketing Engineer - AI Infrastructure (US, CA, Santa Clara)
- Senior Technical Marketing Engineer - Datacenter Networking (US, CA, Santa Clara)
- Senior Technical Program Manager - Datacenter Compute Server Software (US, CA, Santa Clara)
- Senior Technical Program Manager - Infrastructure Capacity Management (US, CA, Santa Clara)
- Senior Technical Program Manager – Silicon Solutions (US, CA, Santa Clara)
- Senior Technical Program Manager – Silicon Solutions (US, CA, Santa Clara)
- Senior Technical Program Manager, Compute Software Platform (US, CA, Santa Clara)
- Senior Tegra System Performance Architect (US, CA, Santa Clara)
- Senior Thermal Product Design Engineer (US, CA, Santa Clara)
- Senior Timing Methodology Engineer (US, CA, Santa Clara)
- Senior Verification Engineer - CPU (US, CA, Santa Clara)
- Senior Verification Engineer, SoC (US, CA, Santa Clara)
- Silicon Reliability Engineer (US, CA, Santa Clara)
- Silicon Solutions Test Development Engineer (US, CA, Santa Clara)
- SoC ASIC Verification Engineer – New College Grad 2025 (US, CA, Santa Clara)
- Software Engineering Manager - GPU Communications Libraries (US, CA, Santa Clara)
- Software Engineering Manager, Distributed Task-based Runtimes (US, CA, Santa Clara)
- Software Engineering Manager, Linear Algebra Libraries (US, CA, Santa Clara)
- Software Engineering Manager, Sparse Linear Algebra Libraries (US, CA, Santa Clara)
- Software Manager (US, CA, Santa Clara)
- Software Manager, Networking (US, CA, Santa Clara)
- Solution Architect, Generative AI - Digital Human (US, CA, Santa Clara)
- Solutions Architect, AI Infrastructure (US, CA, Santa Clara)
- Solutions Architect, AI Infrastructure (US, CA, Santa Clara)
- Solutions Architect, AI Infrastructure (US, CA, Santa Clara)
- Solutions Architect, Agentic AI (US, CA, Santa Clara)
- Solutions Architect, Cloud Providers and Hyperscale (US, CA, Santa Clara)
- Solutions Architect, DGX Cloud (US, CA, Santa Clara)
- Solutions Architect, GenAI Agentic Networks - Telco (US, CA, Santa Clara)
- Solutions Architect, Generative AI (US, CA, Santa Clara)
- Solutions Architect, Generative AI Agents and Data Processing (US, CA, Santa Clara)
- Solutions Architect, Hyperscale (US, CA, Santa Clara)
- Solutions Architect, Networking (US, CA, Santa Clara)
- Solutions Architect, Networking - Hyperscale (US, CA, Santa Clara)
- Solutions Architect, Networking - Hyperscale (US, CA, Santa Clara)
- Speed Characterization Engineer (US, CA, Santa Clara)
- Speed Modeling and Prototyping Engineer (US, CA, Santa Clara)
- Staff Security Engineer, Data Science Platform (US, CA, Santa Clara)
- Supply Chain Planning and Analytics Specialist (US, CA, Santa Clara)
- System Design Engineer (US, CA, Santa Clara)
- System Products Memory Solutions Engineer (US, CA, Santa Clara)
- System Software Engineer - CUDA Driver (US, CA, Santa Clara)
- System Software Engineer, High Integrity Data Pipelining (US, CA, Santa Clara)
- System Software Engineer, Performance - CUDA Driver (US, CA, Santa Clara)
- Technical Marketing Engineer (US, CA, Santa Clara)
- Technical Marketing Manager - Data Analytics Specialist (US, CA, Santa Clara)
- Technical Product Manager - AV Simulation (US, CA, Santa Clara)
- Technical Support Engineer, Linux and HPC Admin - DGX Cloud (US, CA, Santa Clara)
- VLSI Timing Methodology Intern - Summer 2025 (US, CA, Santa Clara)
US, MA, Westford
- Applied Science Research Lab Manager (US, MA, Westford)
- Senior ASIC Design Engineer (US, MA, Westford)
- Senior ASIC Timing Engineer (US, MA, Westford)
- Senior ASIC Verification Engineer - HSIO (US, MA, Westford)
- Senior DevOps Engineer - Accelerated Computing (US, MA, Westford)
- Senior Power Integrity Engineer (US, MA, Westford)
- Senior VLSI Physical Design Integration Engineer (US, MA, Westford)
- Software Manager - BlueField DPU Platforms (US, MA, Westford)
US, NC, Durham
- EDA Infrastructure Engineer (US, NC, Durham)
- Senior ASIC Verification Engineer - GPU Memory Subsystem (US, NC, Durham)
- Senior Field Application Engineer (US, NC, Durham)
- Senior HPC Technical Support Engineer – Ethernet (US, NC, Durham)
- Senior Solutions Architect, NPN (US, NC, Durham)
US, NY, New York
US, NY, Remote
US, OR, Hillsboro
US, OR, Remote
US, TX, Austin
- ASIC Verification Engineer (US, TX, Austin)
- Research Scientist, Design Automation - New College Grad 2025 (US, TX, Austin)
- Senior Firmware Engineer – Ethernet Switching (US, TX, Austin)
- Senior Firmware Engineer – GPU Networking (US, TX, Austin)
- Senior Mask Designer and CAD Engineer (US, TX, Austin)
US, TX, Remote
US, WA, Redmond
- Senior Account Manager, Cloud Service Provider – Networking (US, WA, Redmond)
- Senior Deep Learning Engineer (US, WA, Redmond)
- Senior SONiC Python Engineer (US, WA, Redmond)
- Software Advanced Developer (US, WA, Redmond)
- Software Engineer, SONiC (US, WA, Redmond)
- Software Manager, SONiC Verification - Python (US, WA, Redmond)
- Solutions Architect, Networking - Cloud Service Providers (US, WA, Redmond)
US, WA, Remote
US, WA, Seattle
Ukraine, Remote
Vietnam, Hanoi
Vietnam, Remote
- Senior Manager, Test Engineering (Vietnam, Remote)
- Senior Manufacturing Product Engineer (Vietnam, Remote)
- Senior Product Development Engineer (Vietnam, Remote)
- Senior Test Engineer (Vietnam, Remote)
- Senior Test Engineer (Vietnam, Remote)
- Senior Test Engineer (Vietnam, Remote)
- Senior Test Engineer (Vietnam, Remote)
- Solution Architect - AI and ML (Vietnam, Remote)
- System Test Design Engineer (Vietnam, Remote)
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